| 11. |
- Deb, Abhijit Kumar, et al.
(författare)
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System design for DSP applications in transaction level modeling paradigm
- 2004
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Ingår i: 41st Design Automation Conference, Proceedings 2004. - New York, NY, USA : ACM. - 1581138288 ; , s. 466-471
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Konferensbidrag (refereegranskat)abstract
- In this paper, we systematically define three transaction level models (TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP system. We also show a unique language support to build the TLMs. Our results show that the abstract TLMs can be built and simulated much faster than the implementation model at the expense of a reasonable amount of simulation accuracy.
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| 12. |
- Deb, Abhijit Kumar, et al.
(författare)
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System design for DSP applications using the MASIC methodology
- 2004
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Ingår i: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS. - LOS ALAMITOS : IEEE COMPUTER SOC. - 0769520855 ; , s. 630-635
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Konferensbidrag (refereegranskat)abstract
- Expensive top-down iterations are often required in the design cycle of complex DSP systems. In this paper, we introduce two levels of abstraction in the design flow by, systematically categorizing the architectural decisions. As a result, the top-down iteration loop is broken. We also present a technique to capture and inject the architectural decisions such that the system models can be created and simulated efficiently. The concepts are illustrated by a realistic speech processing example, which is implemented using the AMBA on-chip architecture. Our methodology offers a smooth path from the functional modeling phase to the implementation level, facilitates the reuse of HW and SW components, and enjoys existing tool support at the backend.
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| 13. |
- Diallo, P. I., et al.
(författare)
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A formal, model-driven design flow for system simulation and multi-core implementation
- 2015
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Ingår i: 2015 10th IEEE International Symposium on Industrial Embedded Systems. - : IEEE. - 9781467377119 ; , s. 254-263
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Konferensbidrag (refereegranskat)abstract
- With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.
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| 14. |
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| 15. |
- Düring, Morgan, et al.
(författare)
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The ProGram Compiler
- 2003
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Ingår i: University Booth, DATE 2003 conference.
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Konferensbidrag (refereegranskat)
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| 16. |
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| 17. |
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| 18. |
- Ellervee, Peeter, et al.
(författare)
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Exploring ASIC Design Space at System Level with a Neural Network Estimator
- 1994
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Ingår i: Proc. of IEEE ASIC-conference, 1994.
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Konferensbidrag (refereegranskat)abstract
- Estimators are critical tools in doing architectural level exploration of the design space. We present a novel approach to estimation based on the multilayer perceptron which builds the estimation function during the learning process and thus allows to describe arbitrary complex functions. We also describe how the control data flow graph is encoded for the neural network input and we present results of the first experiments made with realistic design examples.
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| 19. |
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| 20. |
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