| 1. |
- Al-Khatib, Iyad, et al.
(författare)
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A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis : Architectural Design Space Exploration
- 2006
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Ingår i: DAC '06. - New York, New York, USA : ACM Press. ; , s. 125-130
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Konferensbidrag (refereegranskat)abstract
- In this paper we focus on MPSoC architectures for human heart ECGreal-time monitoring and analysis. This is a very relevant bio-medicalapplication, with a huge potential market, hence it is an ideal targetfor an application-specific SoC implementation. We investigate asymmetric multi-processor architecture based on STMicroelectronicsVLIW DSPs that process in real-time 12-lead ECG signals. Thisarchitecture improves upon state-of-the-art SoC designs for ECGanalysis in its ability to analyze the full 12 leads in real-time, evenwith high sampling frequencies, and ability to detect heartmalfunction. We explore the design space by considering a number ofhardware and software architectural options.
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| 2. |
- Khatib, Iyad Al, et al.
(författare)
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MPSoC ECG biochip : A multiprocessor system-on-chip for real-time human heart monitoring and analysis
- 2006
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Ingår i: Proceedings of the 3rd Conference on Computing Frontiers 2006, CF '06. - New York, NY, USA : ACM. - 9781595933027 ; , s. 21-28
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Konferensbidrag (refereegranskat)abstract
- The interest in high performance chip architectures for biomedical applications is on the rise. Heart diseases remain by far the main cause of death and a challenging problem for biomedical engineers to monitor and analyze. Electrocardiography (ECG) is an essential practice in heart medicine, which faces computational challenges, especially when 12 lead signals are to be analyzed in parallel, in real time, and under increasing sampling frequencies. Another challenge is the analysis of huge amounts of data that may grow to days of recordings. Nowadays, doctors use eyeball monitoring of the 12-lead ECG paper readout, which may seriously impair analysis accuracy. Our solution leverages the advance in multi-processor system-on-chip architectures, and is centered on the parallelization of the ECG computation kernel. It improves upon state-of-the-art mostly for its capability to perform real-time analysis of input data, leveraging the computation horsepower provided by many concurrent DSPs, more accurate diagnosis of cardiac diseases, and prompter reaction to abnormal heart alterations. The design methodology to go from the 12-lead ECG application specification to the final hardware/software architecture, modeling, and simulation is the focus of this paper. Our system model is based on industrial components. The architectural template we employ is scalable and flexible.
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| 3. |
- Ruggiero, Martino, et al.
(författare)
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A Cooperative, Accurate Solving Framework for Optimal Allocation, Scheduling and Frequency Selection on Energy-Efficient MPSoCs
- 2006
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Ingår i: Intl. Symposium on System-on-Chip SOC06,2006.
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Konferensbidrag (refereegranskat)abstract
- Most problems addressed by the software optimization flow for multi-processor systems-on-chip (MPSoCs) are NP-complete, and have been traditionally tackled by means of heuristics and highlevel approximations. Complete approaches have been effectively deployed only under unrealistic simplifying assumptions. We propose a novel methodology to formulate and solve to optimality the allocation, scheduling and discrete voltage selection problem for variable voltage/frequency MPSoCs, minimizing the system energy dissipation and the overhead for frequency switching. We integrate the optimization and validation steps to increase the accuracy of cost models and the confidence in quality of results. Two demonstrators are used to show the viability of the proposed methodology.
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