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Träfflista för sökning "WFRF:(Hemani Ahmed) "

Sökning: WFRF:(Hemani Ahmed)

  • Resultat 41-50 av 284
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41.
  • Deb, Abhijit Kumar, et al. (författare)
  • Hardware software codesign of DSP system using grammar based approach
  • 2001
  • Ingår i: VLSI Design, 2001. Fourteenth International Conference on. ; , s. 42-47
  • Konferensbidrag (refereegranskat)abstract
    • Embedded cores are gaining widespread use to deal with the complex DSP systems where flexibility is of utmost importance. The design of such a system offers several problems, which are not addressed by the existing methodology. The authors previously presented an integrated grammar based DSP design methodology that separates architectural and functional specification, can create a virtual prototype and has a smooth link to the implementation phase. In this paper we present the extension of the work to handle embedded cores. Here we the capture the host peripheral interface (HPI) of TMS320C6x core at higher level of abstraction and provide a single simulation environment, which facilitates faster analysis of hardware software components. Our results reveal that the proposed methodology offers simulation time speed-up of 5 times and design time speed-up of 8 times, while keeping the architectural specification separated from functionality
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42.
  • Dhilleswararao, Pudi, et al. (författare)
  • Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures
  • 2023
  • Ingår i: Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2023. - : Association for Computing Machinery (ACM). ; , s. 86-92
  • Konferensbidrag (refereegranskat)abstract
    • Convolution has been widely employed in image processing and computer vision applications such as picture augmentation, smoothing, and structure extraction. In addition, convolution operations are the most prevalent computing patterns in machine learning domains. Convolutions, for example, are used in a substantial chunk of state-of-the-art convolutional neural network operations. Therefore, effectively mapping convolution operations onto hardware architectures is crucial for achieving superior performance while accelerating convolutional neural networks. In this paper, we proposed various algorithms to efficiently map the 2-D convolution operation onto a dynamically reconfigurable resource array and distributed memory architecture. Furthermore, we have discussed the mapping of 2-D convolution on the target architecture for an input matrix of arbitrary size, as well as the generalization of the proposed approaches for multi-column DRRA architectures.
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46.
  • Ellervee, Peeter, et al. (författare)
  • Exploiting data transfer locality in memory mapping
  • 1999
  • Ingår i: EUROMICRO Conference, 1999. Proceedings. 25th. ; , s. 14-21
  • Konferensbidrag (refereegranskat)abstract
    • System-level exploration of memory architectures is one of the key issues in successful implementation of data-transfer dominated applications. Usually, one of the main design bottlenecks is the memory access bandwidth. Transformations, rearranging the layout of the data records stored in memory, are very effective to improve the locality of the data transfers but usually lead to a large memory bit-wastage when not performed carefully. In this paper, a methodology which reduces memory bandwidth requirements without sacrificing storage space is proposed. The methodology exploits parallelism in the data-transfers to rearrange the layout of the data records. Distributed memory organization combined with our proposed layout rearrangement methodology allow to effectively reduce the memory bandwidth bottleneck in data-transfer dominated applications
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47.
  • Ellervee, Peeter, et al. (författare)
  • Exploring ASIC Design Space at System Level with a Neural Network Estimator
  • 1994
  • Ingår i: Proc. of IEEE ASIC-conference, 1994.
  • Konferensbidrag (refereegranskat)abstract
    • Estimators are critical tools in doing architectural level exploration of the design space. We present a novel approach to estimation based on the multilayer perceptron which builds the estimation function during the learning process and thus allows to describe arbitrary complex functions. We also describe how the control data flow graph is encoded for the neural network input and we present results of the first experiments made with realistic design examples.
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