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Träfflista för sökning "WFRF:(Nilsson Peter) ;pers:(Torkelson Mats)"

Sökning: WFRF:(Nilsson Peter) > Torkelson Mats

  • Resultat 21-27 av 27
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22.
  • Åström, Pontus, et al. (författare)
  • Low Power Optimization of Bit-Serial Digital Filters
  • 1997
  • Ingår i: Tenth Annual IEEE International ASIC Conference and Exhibit, 1997. Proceedings.. - 0780342836 ; , s. 229-232
  • Konferensbidrag (refereegranskat)abstract
    • A new approach to optimize full custom, fixed coefficient bit-serial filters aimed at high sample rate and low power consumption is presented. The idea is to trade the filter order with the coefficient length. To show the results two filters were designed and implemented, one as a minimum order filter and the other as a minimum coefficient filter. Measurements shows that a ten fold increase in sample rate can be obtained at half the power consumption
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23.
  • Åström, Pontus, et al. (författare)
  • Power Reduction in Custom CMOS Digital Filter Structures
  • 1999
  • Ingår i: Analog Integrated Circuits and Signal Processing. - 0925-1030. ; 18:1, s. 97-105
  • Tidskriftsartikel (refereegranskat)abstract
    • Today the main optimization parameter of digital filters is the filter order. By the aid of two implemented filters we will show that both power and speed can be enhanced if the optimization effort is made on reducing the filter coefficient lengths rather than minimizing the order. Both filters have been designed from the same specification, one as a standard minimum order filter, the other as a filter with short coefficients found by a computer search. The minimum order filter is of order three with seven bits long coefficients. The coefficient optimized filter is of order six with two bits long coefficients. Both filters were implemented with bit-serial fixed coefficient arithmetic in two's complement representation in a 0.8µ, two metal layers CMOS process. Measurements show an eightfold speedup at half the power consumption and only 30% area cost for the coefficient optimized filter.
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24.
  • Öwall, Viktor, et al. (författare)
  • A GSM speech coder implemented on a customized processor architecture
  • 1993
  • Ingår i: ISCAS '93, 1993 IEEE International Symposium on Circuits and Systems. - 0780312813 ; , s. 235-238
  • Konferensbidrag (refereegranskat)abstract
    • - A GSM speech coder has been implemented on a custom DSP using a system for design of arbitrary processor architectures. The speech coder has been generated from a high level description to netlist. The design system allows implementation in various technologies and a netlist for Plessey gate array has been generated. Due to the rigid specification of the speech coder, the advantages of a custom DSP can not be fully utilized and a result in clock cycles and ROM storage comparable to a standard DSP is achieved.
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25.
  • Öwall, Viktor, et al. (författare)
  • Custom DSP Design of a GSM Speech Coder
  • 1995
  • Ingår i: Journal of VLSI Signal Processing. - 0922-5773. ; 11:3, s. 213-228
  • Tidskriftsartikel (refereegranskat)abstract
    • The GSM speech coder for digital mobile telephones has been designed on a custom DSP using an environment for development of arbitrary processor architectures. A netlist of the speech coder has been generated from a high level description in a presented design environment. Improvement of the performance both by modifying the high level description and by hand optimization of the microcode is discussed. Advantages of a user interactive system were stepwise refinement leads to a competitive result is thus demonstrated. Simulation has been performed at algorithm, microcode, and transistor level for consistency check. To avoid dependency of a specific vendor the design environment allows implementation in various technologies and a netlist for a Plessey gate array has been generated as an example.
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