| 1. |
- Jeppson, Kjell, 1947, et al.
(författare)
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A content-addressable memory cell with MNOS transistors
- 1973
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Ingår i: IEEE Journal of Solid-State Circuits. - 0018-9200. ; 8:5, s. 338 - 343
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Tidskriftsartikel (refereegranskat)abstract
- Describes a new associative memory cell in which MNOS transistors are used as storage elements. The memory can perform functions as a read-only memory and at the same time as a read-write memory. The cell can be read as a random-access memory or as a content-addressable memory. As a CAM certain bits can be masked out, i.e., not compared with the stored bits. The comparison can also be controlled from the memory by the stored words. Since the word length or combinations of normal words can be stored in one word of the memory, fewer memory cells are needed than in an ordinary memory. Searches for groups of words (prime implicands) can be performed. Memory cells with an area of 5000-m- have been built to demonstrate the feasibility of the MNOS-CAM.
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| 2. |
- Jeppson, Kjell, 1947
(författare)
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Design and characterization of MIS devices
- 1976
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This work is a part of the research performed at the Research Laboratory of Electronics (Elektronfysik III), concerning [metal-insulator-semiconductor] MIS field-effect devices. It deals with the properties of different memory devices, such as the [metal-nitride-oxide-semiconductor] MNOS and the [floating-gate avalanche-injection metal-oxide-semiconductor] FAMOS memory transistors, where the [metal insulator semiconductor] MIS structure is utilized for information storage. Paper A describes a new associative memory cell in which MNOS transistors are used as storage elements. Paper B describes the Negative Bias Stress of MOS devices at high electric fields with respect to the degradation observed in MNOS memory devices repeatedly operated at high write/erase gate voltages. Paper C deals with the FAMOS memory device and how the information may be unintentionally changed after a large number of read cycles. Paper D is concerned with some critical problems during fabrication of low threshold voltage CMOS circuits for digital watch applications. Paper E shows the influence of a narrow channel width on the threshold voltage in MOS transistors when modulated by the substrate-source voltage.
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| 3. |
- Jeppson, Kjell, 1947
(författare)
-
Influence of the channel width on the threshold voltage modulation in MOSFETs
- 1975
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Ingår i: Electronics Letters. - : Institution of Engineering and Technology (IET). - 1350-911X .- 0013-5194. ; 11:14, s. 297-299
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Tidskriftsartikel (refereegranskat)abstract
- The threshold voltage of an MOS field-effect transistor is modulated by the source-to-substrate reverse bias. In the letter, the theory for long- and short-channel transistors is extended to include the influence of the channel width. The result is an analytical expression for the threshold voltage as a function of geometry and bias that agrees well with experimental data.
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| 4. |
- Jeppson, Kjell, 1947, et al.
(författare)
-
Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices
- 1977
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 48:5, s. 2004-2014
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Tidskriftsartikel (refereegranskat)abstract
- One of the most important degradation effects observed in MNOS memory transistors is a negative shift of the threshold window. This negative shift is caused by a strong increase of the density of Si‐SiO2 surface traps. This effect has been proposed to be caused by the same effect that is observed in MOS devices subjected to negative‐bias stress (NBS). In this paper, a detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25–125°C) and fields (400–700 MV/m) comparable to those used in MNOS devices is presented. Two different behaviors are observed. At low fields the surface‐trap density increases as t^1/4 and at high fields it increases linearly with the stress time t. The low‐field behavior is temperature and field dependent and the zero‐field activation energy is determined to be 0.3 eV. The high‐field behavior is strongly field dependent but independent of temperature. A physical model is proposed to explain the surface‐trap growth as being diffusion controlled at low fields and tunneling limited at high fields. A comparison with MNOS degradation is made and it was found to be related to the t^1/4 behavior mentioned above.
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| 5. |
- Jeppson, Kjell, 1947, et al.
(författare)
-
Retention Testing of MNOS LSI Memories
- 1979
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Ingår i: IEEE Journal of Solid-State Circuits. - 0018-9200. ; 14:4, s. 723-729
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Tidskriftsartikel (refereegranskat)abstract
- User-oriented test methods for MNOS LSI memories with built-in test modes have been developed. Their application is demonstrated on the commercial ER3401 memory. The memory retention is evaluated in two cases-the static retention time in power-down or in stand-by and the read retention during repeated reading, i.e., the maximum number of read cycles. In the first case, the two loss mechanisms, tunneling and thermal excitation of stored charge are evaluated separately and their influence is combined. In the second case, the limiting mechanism is slow writing by the read signal. On bases of these investigations, a static retention time of 60 yr at 70ºC and 2 yr at 125ºC is predicted and a read retention of 3x10^11 read cycles at 70ºC and 2x10^9 cycles at 125ºC is found for the ER3401.
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| 6. |
- Jeppson, Kjell, 1947, et al.
(författare)
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The effects of impurity redistribution of the subthreshold leakage current in CMOS n-channel transistors
- 1976
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101. ; 19:1, s. 83-85
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Tidskriftsartikel (refereegranskat)abstract
- A study of subthreshold leakage current in n-channel transistors on low threshold voltage CMOS circuits has been made. Redistribution of impurities at the silicon surface during thermal oxidation is shown to be the main cause of excess subthreshold leakage current. Processing techniques to minimize this leakage have been developed.
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| 7. |
- Jeppson, Kjell, 1947, et al.
(författare)
-
Unintentional writing of a FAMOS memory device during reading
- 1976
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Ingår i: Solid-State Electronics. - 0038-1101. ; 19:6, s. 455-457
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Tidskriftsartikel (refereegranskat)abstract
- A FAMOS cell may be unintentionally written during repeated reading. The temperature dependence of this failure process was studied and it is shown that the worst case for unintentional charging of a FAMOS device occurs at low temperatures. This is qualitatively explained by a simple model including the temperature dependence of preavalanche carrier multiplication and hot electron injection.
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