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Sökning: WFRF:(Abdulla Parosh)

  • Resultat 1-10 av 206
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1.
  • Abdulla, Parosh Aziz, 1961-, et al. (författare)
  • A classification of the expressive power of well-structured transition systems
  • 2011
  • Ingår i: Information and Computation. - : Elsevier BV. - 0890-5401 .- 1090-2651. ; 209:3, s. 248-279
  • Tidskriftsartikel (refereegranskat)abstract
    • We compare the expressive power of a class of well-structured transition systems that includes relational automata (extensions of), Petri nets, lossy channel systems, constrained multiset rewriting systems, and data nets. For each one of these models we study the class of languages generated by labeled transition systems describing their semantics. We consider here two types of accepting conditions: coverability and reachability of a fixed a priori configuration. In both cases we obtain a strict hierarchy in which constrained multiset rewriting systems is the most expressive model.
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2.
  • Abdulla, Parosh Aziz, et al. (författare)
  • A general approach to partial order reductions in symbolic verification
  • 1998
  • Ingår i: Computer Aided Verification. - 9783540646082 - 9783540693390 ; , s. 379-390
  • Konferensbidrag (refereegranskat)abstract
    • The purpose of partial-order reduction techniques is to avoid exploring several interleavings of independent transitions when model checking the temporal properties of a concurrent system. The purpose of symbolic verification techniques is to perform basic manipulations on sets of states rather than on individual states. We present a general method for applying partial order reductions to improve symbolic verification. The method is equally applicable to the verification of finite-state and infinite-state systems. It considers methods that check safety properties, either by forward reachability analysis or by backward reachability analysis. We base the method on the concept of commutativity (in one direction) between predicate transformers. Since the commutativity relation is not necessarily symmetric, this generalizes those existing approaches to partial order verification which are based on a symmetric dependency relation.We show how our method can be applied to several models of infinite-state systems: systems communicating over unbounded lossy FIFO channels, and unsafe (infinite-state Petri Nets. We show by a simple example how partial order reduction can significantly speed up symbolic backward analysis of Petri Nets.
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3.
  • Abdulla, Parosh Aziz, et al. (författare)
  • A load-buffer semantics for total store ordering
  • 2018
  • Ingår i: Logical Methods in Computer Science. - 1860-5974. ; 14:1
  • Tidskriftsartikel (refereegranskat)abstract
    • We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed. However, it is important in general to prove the correctness of a system/algorithm in a parametric way with an arbitrarily large number of processes. In this paper, we introduce an alternative (yet equivalent) semantics to the classical one for the TSO semantics that is more amenable to efficient algorithmic verification and for the extension to parametric verification. For that, we adopt a dual view where load buffers are used instead of store buffers. The flow of information is now from the memory to load buffers. We show that this new semantics allows (1) to simplify drastically the safety analysis under TSO, (2) to obtain a spectacular gain in efficiency and scalability compared to existing procedures, and (3) to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient in practice than the one for bounded instances.
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  • Abdulla, Parosh Aziz, et al. (författare)
  • Adding time to pushdown automata
  • 2012
  • Ingår i: Quantities in Formal Methods. ; , s. 1-16
  • Konferensbidrag (refereegranskat)
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  • Abdulla, Parosh Aziz, et al. (författare)
  • An Integrated Specification and Verification Technique for Highly Concurrent Data Structures
  • 2013
  • Ingår i: Tools and Algorithms for the Construction and Analysis of Systems. - Berlin, Heidelberg : Springer Berlin Heidelberg.
  • Konferensbidrag (refereegranskat)abstract
    • We present a technique for automatically verifying safety properties of concurrent programs, in particular programs which rely on subtle dependen- cies of local states of different threads, such as lock-free implementations of stacks and queues in an environment without garbage collection. Our technique addresses the joint challenges of infinite-state specifications, an unbounded num- ber of threads, and an unbounded heap managed by explicit memory allocation. Our technique builds on the automata-theoretic approach to model checking, in which a specification is given by an automaton that observes the execution of a program and accepts executions that violate the intended specification. We extend this approach by allowing specifications to be given by a class of infinite-state au- tomata. We show how such automata can be used to specify queues, stacks, and other data structures, by extending a data-independence argument. For verifica- tion, we develop a shape analysis, which tracks correlations between pairs of threads, and a novel abstraction to make the analysis practical. We have imple- mented our method and used it to verify programs, some of which have not been verified by any other automatic method before.
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  • Resultat 1-10 av 206
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Abdulla, Parosh Aziz (111)
Atig, Mohamed Faouzi (65)
Jonsson, Bengt (31)
Abdulla, Parosh (27)
Rezine, Ahmed (26)
Holík, Lukás (24)
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Chen, Yu-Fang (15)
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Ngo, Tuan Phong (11)
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Abdulla, Parosh Aziz ... (8)
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