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Träfflista för sökning "AMNE:(TEKNIKVETENSKAP) ;pers:(Alvandpour Atila 1960)"

Search: AMNE:(TEKNIKVETENSKAP) > Alvandpour Atila 1960

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  • Alvandpour, Atila, 1960-, et al. (author)
  • A Low-Leakage Dynamic Multi-Ported Register file in 0.13mm CMOS
  • 2001
  • In: ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design. - New York, USA : ACM. - 1581133715 ; , s. 68-71
  • Conference paper (peer-reviewed)abstract
    • Increasing leakage currents combined with reduced noise margins are seriously degrading the robustness of dynamic circuits. This paper describes a dynamic implementation of a 256X32b 4-read/write-port Register-File for ~6GHz operation at 1.2V in a 0.13 utilize an efficient conditional keeper-technique, where a large fraction of the keeper is turned remains are able to improve upon all-low-Vt performance by 4%, while maintaining Dual-Vt usage. Thus, the robustness is improved by 96% and the active leakage power is reduced by 5X. 
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  • Alvandpour, Atila, 1960-, et al. (author)
  • A sub-130-nm conditional keeper technique
  • 2002
  • In: IEEE Journal of Solid-State Circuits. - : Institute of Electrical and Electronics Engineers (IEEE). - 0018-9200 .- 1558-173X. ; 37:5, s. 633-638
  • Journal article (peer-reviewed)abstract
    • Increasing leakage currents combined with reduced noise margins significantly degrade the robustness of wide dynamic circuits. In this paper, we describe two conditional keeper topologies for improving the robustness of sub-130-nm wide dynamic circuits. They are applicable in normal mode of operation as well as during burn-in test. A large fraction of the keepers is activated conditionally, allowing the use of strong keepers with leaky precharged circuits without significant impact on performance of the circuits. Compared to conventional techniques, up to 28% higher performance has been observed for wide dynamic gates in a 130-nm technology. In addition, the proposed burn-in keeper results in 64% active area reduction
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  • Alvandpour, Atila, 1960-, et al. (author)
  • A Wire Capacitance Estimation Technique for Power Consuming Interconnections at High Levels of Abstraction
  • 1997
  • In: In proceedings of: International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS. ; , s. 305-314
  • Conference paper (peer-reviewed)abstract
    • A new wire estimation technique is presented. It utilizes the topology of the netlist and is sensitive to the actual design. It has the unique quality to estimate the length of every power consuming interconnection individually. Compared to other wire length estimation techniques which use average or total wire length, the result of the new technique shows a strong correlation with the result of "real" automatic placement and route tools. Hence it can estimate a reasonable wire capacitance for each interconnection. The individual wire lengths, combined with individual node activities, are essential for an accurate power estimation.
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  • Alvandpour, Atila, 1960-, et al. (author)
  • Conditional burn-in keeper for dynamic circuits
  • 2004
  • Patent (pop. science, debate, etc.)abstract
    • A dynamic circuit with a conditional keeper for burn-in. In the described embodiments, a conditional keeper is provided which is active only during the burn-in test, where the conditional keeper is sized larger than the standard keepers so as to compensate for additional leakage currents in the dynamic circuit.
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  • Result 1-10 of 81

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