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| 2. |
- Forsberg, Håkan, et al.
(författare)
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Embedded Signal Processing Using Free-Space Optical Hypercube Interconnects
- 2003
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Ingår i: Optical Networks Magazine. - : Springer-Verlag. - 1572-8161 .- 1388-6916. ; 4:4, s. 35-49
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Tidskriftsartikel (refereegranskat)abstract
- The speed and complexity of integrated circuits are increasing rapidly. For instance, today's mainstream processors have already surpassed gigahertz global clock frequencies on-chip. As a consequence, many algorithms proposed for applications in embedded signal-processing (ESP) systems, e.g. radar and sonar systems, can be implemented with a reasonable number (less than 1000) of processors, at least in terms of computational power. An extreme inter-processor network is required, however, to completely implement those algorithms. The demands are such that completely new interconnection architectures must be considered.In the search for new architectures, developers of parallel computer systems can actually take advantage of optical interconnects. The main reason for introducing optics from a system point of view is the strength in using benefits that enable new architecture concepts, e.g. free-space propagation and easy fan-out, together with benefits that can actually be exploited by simply replacing the electrical links with optical ones without changing the architecture, e.g. high bandwidth and complete galvanic isolation.In this paper, we propose a system suitable for embedded signal processing with extreme performance demands. The system consists of several computational modules that work independently and send data simultaneously in order to achieve high throughput. Each computational module is composed of multiple processors connected in a hypercube topology to meet scalability and high bisection bandwidth requirements. Free-space optical interconnects and planar packaging technology make it possible to arrange the hypercubes as planes with an associated three-dimensional communications space and to take advantage of many optical properties. For instance, optical fan-out reduces hardware cost. Altogether, this makes the system capable of meeting high performance demands in, for example, massively parallel signal processing. One 64-channel airborne radar system with nine computational modules and a sustained computational speed of more than 1.6 Tera floating point operations per second (TFLOPS) is presented. The effective inter-module bandwidth in this configuration is 1 024 Gbit/s.
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| 3. |
- Forsberg, Håkan, 1969-, et al.
(författare)
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Opportunities for Optical Planar Interconnection Technology in Terabit Switches
- 2003
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Ingår i: Proceedings of the IASTED International Conference on Wireless and Optical Communications, July 2-4, 2003, Banff, Canada. - Anaheim; Calgary : ACTA Press. - 0889863741 - 9780889863743 ; , s. 155-164
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Konferensbidrag (refereegranskat)abstract
- To keep up with the explosive growth of world-wide network traffic, large-capacity switches, with switching capacities in excess of several terabits per second, are becoming an essential part of the future. To realize such switches, new architecture concepts must be considered. In this paper, we discuss a technology for terabit switches that combines the advantage of using optical communication in all three spatial dimensions and the benefits of using surface mounted optoelectronic as well as electronic chips. We present three different types of packet-based switch fabrics, all based on the optical planar interconnection technology. We then discuss these in terms of capacity, scalability, and physical size. All three implementations have a single switch plane cross sectional bandwidth exceeding 5 Tbps.
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| 4. |
- Hoang, Hoai, et al.
(författare)
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Switched Real-Time Ethernet in Industrial Applications - Asymmetric Deadline Partitioning Scheme
- 2003
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Ingår i: Proc. of the 2nd International Workshop on Real-Time LANs in the Internet Age (RTLIA'2003) in conjunction with the 15th Euromicro Conference on Real-Time Systems, Porto, Portugal, July 1, 2003. ; , s. 4-
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Konferensbidrag (refereegranskat)abstract
- This paper presents work on a switched Ethernet network extended to allow for periodic real-time traffic, using earliest deadline first (EDF) scheduling. A scheme of asymmetrically dividing deadlines of real-time channels between the in and outgoing links to/from the switch is proposed (ADPS). The result of the simulations of setting up RT channels over a full-duplex switched Ethernet network is presented. The simulations show that the ADPS performs well when master-slave communication is assumed over the network. thin layer is needed between the Ethernet protocols and the TCP/IP suite in the end-stations. The switch is responsible for admission control, while both end-stations and the switch have EDF (Earliest Deadline First) scheduling (7). The deadlines of messages over the network are end-to-end based, insofar as it is the maximum time to deliver, from the release time in the source node, to the arrival in the destination. In this paper, we assume a single switch, with one node connected to each physical port. The messages originating from the source do therefore traverse two links, and we need to provide guarantees for the time to deliver over both links. We approach this problem by dividing the end-to- end deadline into two, one for the source to the switch, and one from the switch to the destination. The deadline can be partitioned in a number of ways. The method we choose affects the system. The paper is concerned with analyzing the partitioning of deadlines, and to propose a way that is more suitable for master slave communication, which is a common demand in industrial applications. The results, and indeed the method in its current form, do not refer to a mixed topology. The network topology is confined to a star, with one centralized switch connected to one node on each physical port. A full-duplex network is assumed. The rest of the paper is organized as follows. The network architecture is presented in Section 2. In Section 3, a feasibility analysis is introduced. In section 3, the Asymmetric Deadline Partitioning Scheme (ADPS) with the simulation results are presented.
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| 5. |
- Hoang, Hoai, et al.
(författare)
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Switched real-time Ethernet in industrial applications - deadline partitioning
- 2003
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Ingår i: APCC2003. - Piscataway, N.J. : IEEE. - 0780381149 ; , s. 76-81
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Konferensbidrag (refereegranskat)abstract
- This paper presents work on a switched Ethernet network extended to allow for periodic real-time traffic, using earliest deadline first (EDF) scheduling. A scheme of asymmetrically dividing deadlines of real-time channels between the in and outgoing links to/from the switch is proposed (ADPS). The scheme is compared with the simpler approach of dividing the deadlines in two (SDPS). The results of several software simulations of setting up RT channels over a full-duplex switched Ethernet network are presented. The simulations show that the ADPS performs better than the SDPS when master-slave communication is assumed over the network.
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| 6. |
- Jonsson, Magnus, 1969-
(författare)
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Optical interconnection technology in switches, routers and optical cross connects
- 2003
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Ingår i: Optical Networks Magazine. - Berlin : Springer Berlin/Heidelberg. - 1388-6916. ; 4:4, s. 20-34
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Tidskriftsartikel (refereegranskat)abstract
- The performance of data- and telecommunication equipment must keep abreast of the increasing network speed. At the same time, it is necessary to deal with the internal interconnection complexity, which typically grows by N2 or NlogN, where N is the number of ports. This requires new interconnection technologies to be used internally in the equipment. Optical interconnection technology is a promising alternative and much work has already been done. This paper reviews a number of optical and optoelectronic interconnection architectures, especially from a data and telecommunication equipment point of view. Three kinds of systems for adopting optical interconnection technology are discussed: (i) optical cross connects (OXCs), (ii) switches and routers with some kind of burst switching and (iii) switches and routers that redirect traffic on the packet or cell level. The interconnection technologies and architectures are discussed according to their suitability for adoption in the three system types.
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