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Träfflista för sökning "LAR1:hh srt2:(2020);pers:(Pettersson Håkan 1962)"

Sökning: LAR1:hh > (2020) > Pettersson Håkan 1962

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1.
  • Devi, Chandni, et al. (författare)
  • Electrical transport properties of InAs nanowires synthesized by a solvothermal method
  • 2020
  • Ingår i: Nanotechnology. - Bristol : Institute of Physics Publishing (IOPP). - 0957-4484 .- 1361-6528. ; 31:23
  • Tidskriftsartikel (refereegranskat)abstract
    • Nanowires are widely considered to be key elements in future disruptive electronics and photonics. This paper presents the first detailed study of transport mechanisms in single-crystalline InAs nanowires synthesized by a cheap solvothermal wet chemical method. From detailed analyses of temperature-dependent current-voltage characteristics, it was observed that contacted nanowires operate in a linear transport regime at biases below a critical cross-over voltage. For larger biases, the transport changes to space-charge-limited conduction assisted by traps. The characteristic parameters such as free electron concentration, trap concentration and energy distribution, and electron mobility were all calculated. It was demonstrated that the nanowires have key electrical properties comparable to those of InAs nanowires grown by molecular beam epitaxy. Our results might pave the way for cheap disruptive low-dimensional electronics such as resistive switching devices. © 2020 IOP Publishing Ltd.
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2.
  • Jafari Jam, R., et al. (författare)
  • Embedded sacrificial AlAs segments in GaAs nanowires for substrate reuse
  • 2020
  • Ingår i: Nanotechnology. - Bristol : Institute of Physics Publishing (IOPP). - 0957-4484 .- 1361-6528. ; 31:20
  • Tidskriftsartikel (refereegranskat)abstract
    • We report on the use of a sacrificial AlAs segment to enable substrate reuse for nanowire synthesis. A silicon nitride template was deposited on a p-type GaAs substrate. Then a pattern was transferred to the substrate by nanoimprint lithography and reactive ion etching. Thermal evaporation was used to define Au seed particles. Metalorganic vapour phase epitaxy was used to grow AlAs-GaAs NWs in the vapour-liquid-solid growth mode. The yield of synthesised nanowires, compared to the number expected from the patterned template, was more than 80%. After growth, the nanowires were embedded in a polymer and mechanically removed from the parent substrate. The parent substrate was then immersed in an HCl:H2O (1:1) mixture to dissolve the remaining stub of the sacrificial AlAs segment. The pattern fidelity was preserved after peeling off the nanowires and cleaning, and the semiconductor surface was flat and ready for reuse. Au seed particles were then deposited on the substrate by use of pulse electrodeposition, which was selective to the openings in the growth template, and then nanowires were regrown. The yield of regrowth was less optimal compared to the first growth but the pattern was preserved. Our results show a promising approach to reduce the final cost of III-V nanowire based solar cells. © 2020 The Author(s). Published by IOP Publishing Ltd.
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3.
  • Jafari Jam, Reza, et al. (författare)
  • Template-assisted vapour-liquid-solid growth of InP nanowires on (001) InP and Si substrates
  • 2020
  • Ingår i: Nanoscale. - Cambridge : Royal Society of Chemistry. - 2040-3364 .- 2040-3372. ; 12:2, s. 888-894
  • Tidskriftsartikel (refereegranskat)abstract
    • We report on the synthesis of vertical InP nanowire arrays on (001) InP and Si substrates using template-assisted vapour-liquid-solid growth. A thick silicon oxide layer was first deposited on the substrates. The samples were then patterned by electron beam lithography and deep dry etching through the oxide layer down to the substrate surface. Gold seed particles were subsequently deposited in the holes of the pattern by the use of pulse electrodeposition. The subsequent growth of nanowires by the vapour-liquid-solid method was guided towards the [001] direction by the patterned oxide template, and displayed a high growth yield with respect to the array of holes in the template. In order to confirm the versatility and robustness of the process, we have also demonstrated guided growth of InP nanowire p-n junctions and InP/InAs/InP nanowire heterostructures on (001) InP substrates. Our results show a promising route to monolithically integrate III-V nanowire heterostructure devices with commercially viable (001) silicon platforms.
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  • Resultat 1-3 av 3

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