| 1. |
- Andrei, Alexandru, 1977-, et al.
(författare)
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Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
- 2004
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Ingår i: Design, Automation and Test in Europe DATE 2004,2004. - Paris, France : IEEE Computer Society Press. - 0769520855 ; , s. 518-
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Konferensbidrag (refereegranskat)abstract
- Dynamic voltage scaling and adaptive body biasing have been shown to reduce dynamic and leakage power consumption effectively. In this paper, we optimally solve the combined supply voltage and body bias selection problem for multi-processor systems with imposed time constraints, explicitly taking into account the transition overheads implied by changing voltage levels. Both energy and time overheads are considered. We investigate the continuous voltage scaling as well as its discrete counterpart, and we prove NP-hardness in the discrete case. Furthermore, the continuous voltage scaling problem is formulated and solved using nonlinear programming with polynomial time complexity, while for the discrete problem we use mixed integer linear programming. Extensive experiments, conducted on several benchmarks and a real-life example, are used to validate the approaches.
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| 2. |
- Andrei, Alexandru, 1977-, et al.
(författare)
-
Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
- 2005
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Ingår i: IEE Proceedings - Computers and digital Techniques. - : IEEE. - 1350-2387 .- 1359-7027. ; 152:01, s. 28-38
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Tidskriftsartikel (refereegranskat)abstract
- Dynamic voltage scaling and adaptive body biasing have been shown to reduce dynamic and leakage power consumption effectively. In this paper, we optimally solve the combined supply voltage and body bias selection problem for multi-processor systems with imposed time constraints, explicitly taking into account the transition overheads implied by changing voltage levels. Both energy and time overheads are considered. We investigate the continuous voltage scaling as well as its discrete counterpart, and we prove NP-hardness in the discrete case. Furthermore, the continuous voltage scaling problemis formulated and solved using nonlinear programming with polynomial time complexity, while for the discrete problem we use mixed integer linear programming. Extensive experiments, conducted on several benchmarks and a real-life example, are used to validate the approaches.
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| 3. |
- Andrei, Alexandru, 1977-, et al.
(författare)
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Predictable Implementation of Real-Time Applications on Multiprocessor Systems on Chip
- 2008
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Ingår i: VLSI Design, 2008. VLSID 2008. - : IEEE Computer Society. - 0769530834 - 9780769530833 ; , s. 103-110
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Konferensbidrag (refereegranskat)abstract
- Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restrictive and particular contexts. One important aspect that makes the analysis difficult is the estimation of the system-s communication behavior. The traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers as result of cache misses. As opposed to the analysis performed for a single processor system, where the cache miss penalty is constant, in a multiprocessor system each cache miss has a variable penalty, depending on the bus contention. This affects the tasks- WCET which, however, is needed in order to perform system scheduling. At the same time, the WCET depends on the system schedule due to the bus interference. In this context, we propose, for the first time, an approach to worst-case execution time analysis and system scheduling for real-time applications implemented on multiprocessor SoC architectures.
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| 4. |
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| 5. |
- Andrei, Alexandru, 1977-, et al.
(författare)
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Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems
- 2004
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Ingår i: International Conference on Computer Aided Design ICCAD 2004,2004. - San Jose, USA : IEEE Computer Society Press. - 0780387023 ; , s. 362-
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Konferensbidrag (refereegranskat)abstract
- In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption. The voltage scaling technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic voltage swing scaling. We also introduce a set of accurate communication models for the energy estimation of voltage scalable embedded systems. In particular, we demonstrate that voltage scaling of bus repeaters and dynamic adaption of the voltage swing on fat wires can significantly influence the system's energy consumption. Experimental results, conducted on numerous generated benchmarks and a real-life example, demonstrate that substantial energy savings can be achieved with the proposed techniques.
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| 6. |
- Andrei, Alexandru, 1977-, et al.
(författare)
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Voltage Selection for Time-Constrained Multiprocessor Systems on Chip
- 2007
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Ingår i: Designing Embedded Processors: A Low Power Perspective. - Dordrecht : Springer. - 9781402058684 - 1402058683 ; , s. 259-286
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Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
- As we embrace the world of personal, portable, and perplexingly complex digital systems, it has befallen upon the bewildered designer to take advantage of the available transistors to produce a system which is small, fast, cheap and correct, yet possesses increased functionality. Increasingly, these systems have to consume little energy.Designers are increasingly turning towards small processors, which are low power, and customize these processors both in software and hardware to achieve their objectives of a low power system, which is verified, and has short design turnaround times. Designing Embedded Processors examines the many ways in which processor based systems are designed to allow low power devices.It looks at processor design methods, memory optimization, dynamic voltage scaling methods, compiler methods, and multi processor methods. Each section has an introductory chapter to give a breadth view, and have a few specialist chapters in the area to give a deeper perspective. The book provides a good starting point to engineers in the area, and to research students embarking upon the exciting area of embedded systems and architectures.
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| 7. |
- Bao, Min, 2000-, et al.
(författare)
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Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling
- 2008
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Ingår i: 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008. - : IEEE Computer Society. - 9781424422760 ; , s. 44-49
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Konferensbidrag (refereegranskat)abstract
- Temperature has become an important issue in nowadays MPSoCs design due to the ever increasing power densities and huge energy consumption. This paper proposes a temperature-aware task mapping technique for energy optimization in systems with dynamic voltage selection capability. It evaluates the efficiency of this technique, based on the analysis of the factors that can influence the potential gains that can be expected from such a technique, compared to a task mapping approach that ignores temperature.
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| 8. |
- Bao, Min, 2000-, et al.
(författare)
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Temperature-Aware Voltage Selection for Energy Optimization
- 2008
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Ingår i: Design, Automation and Test in Europe, 2008. - : IEEE. - 9783981080131 ; , s. 1083-1086
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Konferensbidrag (refereegranskat)abstract
- This paper proposes a temperature-aware dynamic voltage selection technique for energy minimization and presents a thorough analysis of the parameters that influence the potential gains that can be expected from such a technique, compared to a voltage selection approach that ignores temperature.
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| 9. |
- Bordoloi, Unmesh D., et al.
(författare)
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Customizing Instruction Set Extensible Reconfigurable Processors using GPUs
- 2012
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Ingår i: <em>25th International Conferennce on VLSI Design, Hyderabad, India, January 07-11, 2012.</em>. - : IEEE. - 9780769546384 - 9781467304382 ; , s. 418-423
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Konferensbidrag (refereegranskat)abstract
- Many reconfigurable processors allow their instruction sets to be tailored according to the performance requirements of target applications. They have gained immense popularity in recent years because of this flexibility of adding custom instructions. However, most design automation algorithms for instruction set customization (like enumerating and selecting the optimal set of custom instructions) are computationally intractable. As such, existing tools to customize instruction sets of extensible processors rely on approximation methods or heuristics. In contrast to such traditional approaches, we propose to use GPUs (Graphics Processing Units) to efficiently solve computationally expensive algorithms in the design automation tools for extensible processors. To demonstrate our idea, we choose a custom instruction selection problem and accelerate it using CUDA (CUDA is a GPU computing engine). Our CUDA implementation is devised to maximize the achievable speedups by various optimizations like exploiting on-chip shared memory and register usage. Experiments conducted on well known benchmarks show significant speedups over sequential CPU implementations as well as over multi-core implementations.
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| 10. |
- Cortes, Luis-Alejandro, 1972-, et al.
(författare)
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A Quasi-Static Approach to Minimizing Energy Consumption in Real-Time Systems under Reward Constraints
- 2006
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Ingår i: 12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2006. - : IEEE Computer Society. - 0769526764 ; , s. 279-286
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Konferensbidrag (refereegranskat)abstract
- In some real-time applications, it is desirable to trade off precision for timeliness. For such systems, considered typically under the Imprecise Computation model, a function assigns reward to the application depending on the amount of computation allotted to it. Also, many such applications run on battery-powered devices where the energy consumption is of utmost importance. We address in this paper the problem of energy minimization for Imprecise-Computation systems that have reward and time constraints. We propose a Quasi-Static (QS) approach that exploits, with low on-line overhead, the dynamic slack that arises from variations in the actual number of execution cycles: first, at design-time, a set of solutions are computed and stored (off-line phase); second, the selection among the precomputed assignments is left for run-time, based on actual values of time and reward (on-line phase).
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