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Sökning: LAR1:lu > Konferensbidrag > Spaanenburg Lambert

  • Resultat 1-10 av 51
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1.
  • Ahnlund, Jonas, et al. (författare)
  • Intelligent reduction of nuisance alarms in process control
  • 2003
  • Ingår i: Notes SAIS/SSLS Joint Workshop.
  • Konferensbidrag (refereegranskat)abstract
    • The proper handling of alarms is crucial to automated process control. Fault Detection and Isolation techniques have been widely researched to determine such alarms. In practice, many alarms are only distractive and do not represent a fault situation. Here a toolbox, that uses an expert system called LARA, is proposed that aims to reduce the occurrence of so-called nuisance alarms. It is based on a number of signal classifiers and can be easily extended with metrical abnormality predictors. In a first prototype, a significant reduction of the alarms in a biofueled District Heating Plant has been achieved.
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2.
  • Bergquist, Tord, et al. (författare)
  • Signal processing and alarm handling in process control
  • 2003
  • Ingår i: Proceedings of the 16th European Conference on Circuit Theory and Design, ECCTD'03. - Univ. Mining & Metallurgy. - 83-88309-95-1 ; s. III-369-III-72
  • Konferensbidrag (refereegranskat)abstract
    • The proper handling of alarms is crucial to automated process control. In practice, many alarms are only distractive and do not represent a fault situation. Here a toolbox, that uses an expert system called LARA, is proposed that aims to reduce the occurrence of so-called nuisance alarms. It is based on a signal classification scheme to propose suitable alarm handling algorithms according to the signals behavior. In a first prototype, a significant reduction of the alarms in a biofueled District Heating Plant has been achieved
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3.
  • Bergquist, Tord, et al. (författare)
  • Using correlation in MFM model design and validation
  • 2004
  • Ingår i: Proceedings AILS-04 Workshop. - 1650-1276.
  • Konferensbidrag (refereegranskat)abstract
    • Industrial process signals do affect one other. However, causal dependencies, or corre-lation, and thereby consequences of control actions cannot always be understood by the operator, which may lead to accidents. Models explain dependencies and are mostly built on process knowledge and blueprints, while causalities are visible in the measurements and ought to be used to increase process under-standing. In this paper we will discuss why the cross-correlation technique is insufficient for causality detection in industrial processes and we will present a new method that, for instance, can be used to validate the design of multilevel flow models. Keywords: Correlation, multilevel flow model, fault detection, alarm analysis.
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4.
  • Brugge, M H ter, et al. (författare)
  • Morphological Template Decomposition for DT-CNN
  • 2002
  • Ingår i: Proceedings BNAIC?02. ; s. 35-42
  • Konferensbidrag (refereegranskat)abstract
    • In this paper the established link between Mathematical Morphology and DT-CNN is used to derive a new template decomposition procedure. It is based on the decomposition of morphological structuring elements. From a practical point of view, template decomposition is an important issue since image processing operations can be non-local while the cells in physical DT-CNN realizations often only communicate with cells in their direct neighborhood. Here we apply techniques from morphological algebra to derive a DT-CNN template decomposition strategy, which is far more efficient in terms of the number of templates in the decomposition than the traditional decomposition strategy. In a typical 9 x 9 example, the number of templates reduces from 125 to 14.
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5.
  • Fang, Wen Hai, et al. (författare)
  • Balancing BlockRAM and distributed RAM
  • 2005
  • Ingår i: Proceedings SSoCC 2005.
  • Konferensbidrag (refereegranskat)abstract
    • Xilinx FPGAs offer both Block SelectRAM and distributed RAM for embedded memory. To investigate the impact of utilizing such opportunities, some variations on the hardware implementation of a SNOW 2.0 stream cipher IP core have been designed. We find the ratio of throughput and effective slice usage to be close to 3.5. This allows a flexible trade-off between speed and area consumption, with a throughput between 7200 and 8000 Mbps and a slice usage between 900 and 2400 for Xilinx Virtex II and 4.
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6.
  • Fang, Wen Hai, et al. (författare)
  • In search of a robust digital CNN system
  • 2006
  • Ingår i: Proceedings of the 2006 10th IEEE International Workshop on Cellular Neural Networks and Their Applications. - IEEE Press. - 1-4244-0639-0 ; s. 328-333
  • Konferensbidrag (refereegranskat)abstract
    • Microelectronics promises a high component density and low power dissipation to embedded systems. Unfortunately such a component will always suffer from various error types that make the chip respond differently from its functional simulation. This is especially true for Cellular Neural Networks (CNN), which makes the determination of robust, low-precision parameters to guarantee small footprint and reliable operation an important design consideration. This paper describes the digital word width effects in a CNN implementation that must be considered to achieve a small size for a reliable system. It discusses the automated design space exploration using a Field-Programmable Gate-Array (FPGA) implementation to perform an optimal CNN parameters selection.
7.
  • Fang, Wen Hai, et al. (författare)
  • Power-driven FPGA to ASIC conversion
  • 2007
  • Ingår i: Proceedings of SPIE, the International Society for Optical Engineering. - SPIE. - 0277786X. - 978-081946718-8 ; 6590
  • Konferensbidrag (refereegranskat)abstract
    • Gate arrays are often presented as a convenient means for ASIC prototyping. Obviously, they can both perform the same function and therefore be built from the same behavioral description. Design development implies a process of subsequent parameter bindings, leaving steadily less freedom for the remaining implementation choices. On the other hand, the ASIC offers more place & route freedom than the gate array. Hence it is commonly suggested that an optimal prototype will always have an acceptable ASIC realization. But this does not make the gate array an easy stepping-stone in ASIC development. Differences in platform technology induce a different structural sugaring to achieve a reasonable implementation. This cannot easily be ported, unless the implementation is developed while keeping the restrictions for the other technology in mind. Such implies a number of scaling rules to be the foundation of the design transformation process. This paper looks into the platform commonalities of Field-Programmable Gate-arrays and standard-cell ASICs from fundamental physical principles. These basic considerations are then related to show how the area and speed restrictions in the logic synthesis can be applied to carry power efficient designs efficiently from prototype to realization. This is illustrated in the design of the SNOW-2 encryption core, where a consistent 38% power reduction is achieved.
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8.
  • Fang, Wen Hai, et al. (författare)
  • Snow 2.0 IP core for trusted hardware
  • 2005
  • Ingår i: Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. - IEEE Computer Society. ; 2005, s. 281-286
  • Konferensbidrag (refereegranskat)abstract
    • Stream ciphers like Snow 2.0 are very promising techniques for encryption in trusted hardware, but demand specialized IP cores to enhance conventional architectures. The paper describes the design of such a core that can be adapted to the system needs according to a ratio of throughput and effective slice usage of 3.2 to 3.5. The footprint is comparable with a commercial floating-point unit.
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9.
  • Fang, WenHai, et al. (författare)
  • In search for a robust digital CNN system
  • 2006
  • Ingår i: 2006 10th International Workshop on Cellular Neural Networks and Their Applications (IEEE Cat No. 06TH8915C). - IEEE Press. - 1-4244-0639-0
  • Konferensbidrag (refereegranskat)abstract
    • Microelectronics promises a high component density and low power dissipation to embedded systems. Unfortunately such a component will always suffer from various error types that make the chip respond differently from its functional simulation. This is especially true for cellular neural networks (CNN), which makes the determination of robust, low-precision parameters to guarantee small footprint and reliable operation an important design consideration. This paper describes the digital word width effects in a CNN implementation that must be considered to achieve a small size for a reliable system. It discusses the automated design space exploration using a field-programmable gate-array (FPGA) implementation to perform an optimal CNN parameters selection
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10.
  • Grunditz, C., et al. (författare)
  • Constructing a neural system for surface inspection
  • 2004
  • Ingår i: 2004 IEEE International Joint Conference on Neural Networks. - IEEE. - 0-7803-8359-1 ; s. 1881-1886
  • Konferensbidrag (refereegranskat)abstract
    • Visual quality assurance techniques focus on the detection and qualification of abnormal structures in the image of an object. The features of abnormality are extracted through image mining, whereupon classification is performed on characteristic combinations. Many techniques for feature extraction have been proposed, but the feed-forward neural network is seldom utilized despite its popularity in other application areas. Based on this wide experience base, this paper shows how a multi-tier feed-forward network can be constructed to model detectable peaks using only the physical properties of the image domain. This generic architecture can easily be adapted for different applications, as in metal plate inspection and protein detection, with mean error rate below 5%
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  • Resultat 1-10 av 51
  • [1]23456Nästa
 
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