| 1. |
- Raeissi, Bahman, 1979, et al.
(författare)
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High-k-oxide/silicon interfaces characterized by capacitance frequency spectroscopy
- 2008
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 52:9, s. 1274-1279
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Tidskriftsartikel (refereegranskat)abstract
- Electron capture into insulator/silicon interface states is investigated for high-k dielectrics of Gd2O3 preparedby molecular beam epitaxy (MBE) and atomic layer deposition (ALD), and for HfO2 prepared byreactive sputtering, by measuring the frequency dependence of Metal Oxide Semiconductor (MOS) capacitance.The capture cross sections are found to be thermally activated and to increase steeply with theenergy depth of the interface electron states. The methodology adopted is considered useful for increasingthe understanding of high-k-oxide/silicon interfaces.
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| 2. |
- Hurley, P.K., et al.
(författare)
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Interface Defects in HfO2, LaSiOx, and Gd2O3 High-k/MetalGate Structures on Silicon
- 2008
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Ingår i: J. Electrochem. Soc.. ; 155:2, s. G13-G20
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Tidskriftsartikel (refereegranskat)abstract
- In this work, we present experimental results examining the energy distribution of the relatively high (>1×10^11 cm−2) electrically active interface defects which are commonly observed in high-dielectric-constant (high-k) metal–insulator–silicon systems during high-k process development. This paper extends previous studies on the Si(100)/SiOx/HfO2 system to include a comparative analysis of the density and energy distribution of interface defects for HfO2, lanthanum silicate (LaSiOx), and Gd2O3 thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no H2/N2 annealing following the gate stack formation, reveals a peak density (~2×10^12 cm−2 eV−1 to ~1×10^13 cm−2 eV−1) at 0.83–0.92 eV above the silicon valence bandedge for the HfO2, LaSiOx, and Gd2O3 thin films on Si(100). The characteristic peak in the interface state density (0.83–0.92 eV) is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond (Pbo) centers as the common origin for the dominant interface defects for the various Si(100)/SiOx/high-k/metal gate systems. The results of forming gas (H2/N2) annealing over the temperature range 350–555°C are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed.
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| 3. |
- Raeissi, Bahman, 1979, et al.
(författare)
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Electron traps at HfO2/SiOx interfaces
- 2008
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Ingår i: Proceeding of 38th European Solid-State Device Research Conference (ESSDERC 2008), Edinburgh, Scotland, UK. - 1930-8876. - 9781424423637 ; , s. 130-133
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Konferensbidrag (refereegranskat)abstract
- Electron traps in HfO2 have been investigated by measuring thermally stimulated current (TSC). Two different interface regions have been identified where captured electrons interact with energy band states. The two domains are separated by and close to the “interlayer” of SiOx commonly present in high-k/silicon stacks. On the inner side, between SiOx and silicon, we find an irregular silicon crystal which we interpret as a source for interface states. At the SiOx/HfO2 interface, we find a high concentration of unstable traps with a strong influence on the electric field distribution in the gate stack.
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| 4. |
- Bonmann, Marlene, 1988, et al.
(författare)
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Effect of oxide traps on channel transport characteristics in graphene field effect transistors
- 2017
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Ingår i: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. - : American Vacuum Society. - 2166-2754 .- 2166-2746. ; 35:1, s. 01A115-
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Tidskriftsartikel (refereegranskat)abstract
- A semiempirical model describing the influence of interface states on characteristics of gatecapacitance and drain resistance versus gate voltage of top gated graphene field effect transistors ispresented. By fitting our model to measurements of capacitance–voltage characteristics and relatingthe applied gate voltage to the Fermi level position, the interface state density is found. Knowing theinterface state density allows us to fit our model to measured drain resistance–gate voltagecharacteristics. The extracted values of mobility and residual charge carrier concentration arecompared with corresponding results from a commonly accepted model which neglects the effect ofinterface states. The authors show that mobility and residual charge carrier concentration differsignificantly, if interface states are neglected. Furthermore, our approach allows us to investigate indetail how uncertainties in material parameters like the Fermi velocity and contact resistanceinfluence the extracted values of interface state density, mobility, and residual charge carrierconcentration.
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| 5. |
- Engström, Olof, 1943
(författare)
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Physical trends of High-k oxides
- 2012
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Ingår i: Tutorial at 23rd European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2012) October 1 - 5, 2012 Cagliari, Italy.
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- The properties of rare-earth and transition metal oxides of interest for the development of future silicon nanoelectronics will be reviewed. As an introduction, the motivation for using high-k insulators for MOSFET applications will be given together with a basic enlightenment on two crucial intrinsic properties of gate insulators: the dielectric constant, k, and the energy offset value, ∆E, in relation to silicon. It will be demonstrated how these quantities govern initial navigation along metals in the periodic system to find future oxide candidates with feasible leakage characteristics. An overview will be included on the restraining influence of lower-k interlayers, interface states and oxide traps together with a critical survey of existing characterization methods for crucial quantities. Chemical properties like reactivity, structural stability and hygroscopic qualities of interesting oxides will be treated together with reliability issues. Finally, the future challenge of keeping up gate insulator development with the perspectives of the ITRS roadmap will be discussed.
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