| 1. |
- Gottlob, H. D. B., et al.
(författare)
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Gd silicate : A high-k dielectric compatible with high temperature annealing
- 2009
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567 .- 2166-2754 .- 2166-2746. ; 27:1, s. 249-252
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Tidskriftsartikel (refereegranskat)abstract
- The authors report on the investigation of amorphous Gd-based silicates as high-k dielectrics. Two different stacks of amorphous gadolinium oxide (Gd(2)O(3)) and silicon oxide (SiO(2)) on silicon substrates are compared after annealing at temperatures up to 1000 degrees C. Subsequently formed metal oxide semiconductor capacitors show a significant reduction in the capacitance equivalent thicknesses after annealing. Transmission electron microscopy, medium energy ion scattering, and x-ray diffraction analysis reveal distinct structural changes such as consumption of the SiO(2) layer and formation of amorphous Gd silicate. The controlled formation of Gd silicates in this work indicates a route toward high-k dielectrics compatible with conventional, gate first complementary metal-oxide semiconductor integration schemes.
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| 2. |
- Gottlob, H. D. B., et al.
(författare)
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Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics
- 2009
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 86:7-9, s. 1642-1645
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Tidskriftsartikel (refereegranskat)abstract
- We investigate the potential of gadolinium silicate (GdSiO) as a thermally stable high-k gate dielectric in a gate first integration scheme. There silicon diffuses into gadolinium oxide (Gd2O3) from a silicon oxide (SiO2) interlayer specifically prepared for this purpose. We report on the scaling potential based on detailed material analysis. Gate leakage current densities and EOT values are compatible with an ITRS requirement for low stand by power (LSTP). The applicability of this GdSiO process is demonstrated by fully functional silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). (C) 2009 Elsevier B.V. All rights reserved.
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| 3. |
- Hurley, P.K., et al.
(författare)
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Interface Defects in HfO2, LaSiOx, and Gd2O3 High-k/MetalGate Structures on Silicon
- 2008
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Ingår i: J. Electrochem. Soc.. ; 155:2, s. G13-G20
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Tidskriftsartikel (refereegranskat)abstract
- In this work, we present experimental results examining the energy distribution of the relatively high (>1×10^11 cm−2) electrically active interface defects which are commonly observed in high-dielectric-constant (high-k) metal–insulator–silicon systems during high-k process development. This paper extends previous studies on the Si(100)/SiOx/HfO2 system to include a comparative analysis of the density and energy distribution of interface defects for HfO2, lanthanum silicate (LaSiOx), and Gd2O3 thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no H2/N2 annealing following the gate stack formation, reveals a peak density (~2×10^12 cm−2 eV−1 to ~1×10^13 cm−2 eV−1) at 0.83–0.92 eV above the silicon valence bandedge for the HfO2, LaSiOx, and Gd2O3 thin films on Si(100). The characteristic peak in the interface state density (0.83–0.92 eV) is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond (Pbo) centers as the common origin for the dominant interface defects for the various Si(100)/SiOx/high-k/metal gate systems. The results of forming gas (H2/N2) annealing over the temperature range 350–555°C are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed.
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