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Sökning: WFRF:(Hagberg Hans) > Teknik

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1.
  • Mattisson, Sven, et al. (författare)
  • Sensitivity degradation in a tri-band GSM BiCMOS direct-conversion receiver caused by transient substrate heating
  • 2008
  • Ingår i: IEEE Journal of Solid-State Circuits. - 0018-9200. ; 43:2, s. 486-496
  • Tidskriftsartikel (refereegranskat)abstract
    • An analysis of transient thermal substrate effects impairing the sensitivity of the DCS path in a tri-band GSM/DCS/PCS BiCMOS radio receiver is presented in this paper. A simple thermal model of the substrate is employed, enabling concurrent electrothermal circuit-substrate simulations within a standard analog circuit simulator. Simulation results obtained with this approach match very closely the measured data, and are used to predict the sensitivity of different circuit layout configurations to thermal gradients in the substrate. Following the guidelines suggested by these analyses, a redesigned version of the receiver displays a sensitivity improvement of 2 dB to 4 dB.
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2.
  • Nilsson, Magnus, et al. (författare)
  • A 9-band WCDMA/EDGE transceiver supporting HSPA evolution
  • 2011
  • Ingår i: [Host publication title missing]. - 0193-6530. ; , s. 366-368
  • Konferensbidrag (refereegranskat)abstract
    • The future of cellular radio ICs lies in the integration of an ever-increasing number of bands and channel bandwidths. This paper presents a transceiver together with the associated discrete front-end components. The transceiver supports 4 EDGE bands and 9 WCDMA bands (l-VI and Vlll-X), while the radio can be configured to simultaneously support the 4 EDGE bands and up to 5 WCDMA bands: 3 high bands (HB) and 2 low bands (LB). The RX is a SAW-less homodyne composed of a main RX and a diversity RX. To reduce package complexity with so many bands, we chose to minimize the number of ports by using single-ended RF interfaces for both RX and TX. This saves seve ral package pins, but requires careful attention to grounding. The main RX has 8 LNA ports and the diversity RX has 5, with some LNAs supporting multiple bands. On the TX side, 2 ports are used for all EDGE bands and 4 for the WCDMA bands.
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3.
  • Elgaard, Christian, et al. (författare)
  • Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS
  • Ingår i: IEEE Journal of Solid-State Circuits. - 0018-9200. ; , s. 1-16
  • Tidskriftsartikel (refereegranskat)abstract
    • This article presents a fully integrated millimeter-wave (mmW) transceiver front end covering 24.25–29.5 GHz. It features a wideband Doherty power amplifier utilizing adaptive bias and a transmit/receive switch (TRX-switch) that has embedded low noise amplifier to antenna matching. The phase shift of 90 $^\circ$ to the Doherty auxiliary amplifier is achieved using a separate IQ-mixer with rearranged phases in the auxiliary path, ensuring a wideband 90 $^\circ$ phase shift, and avoiding 3-dB loss from radio frequency (RF) input power splitting. Special emphasis is on the analysis of adaptive bias, the Doherty output combiner network, the decoupling capacitors, and the TRX-switch. Including TRX-switch losses of 1.1 dB in transmit mode, the transmitter reaches a saturated output power of 18.3 dBm with a 1-dB output compression point of 15.9 dBm. Stimulated with a 400-MHz 16-QAM orthogonal frequency-division multiplexing (OFDM) IQ-signal at baseband, without digital IQ-compensation and predistortion, the transmitter delivers a 26.5-GHz modulated signal with an output power ( $P_{\rm out}$ ) of 12.8 dBm and an error vector magnitude (EVM) of $-$ 20.2 dB. The complete transmitter, including quadrature local oscillator drivers, then achieves a power added efficiency (PAE) of 5.8%. For a 1600-MHz wide 64-QAM OFDM signal, $P_{\rm out}$ is 9.0 dBm, with an EVM $=$ $-$ 23.3 dB and a complete transmitter PAE of 3.2%. In receive mode including TRX-switch, at 27.25 GHz, the noise figure is below 4 dB with a gain of 23 dB and a third-order input-referred intercept point of $-$ 9 dBm. The active part of the die, manufactured in 22-nm fully depleted silicon on insulator (FD-SOI) CMOS, occupies 2.3 mm $^2$ .
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