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Sökning: WFRF:(Henry C) > Teknik

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1.
  • Borsato, M., et al. (författare)
  • Unleashing the full power of LHCb to probe stealth new physics
  • 2022
  • Ingår i: Reports on Progress in Physics. - : IOP Publishing. - 0034-4885 .- 1361-6633. ; 85:2
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, we describe the potential of the LHCb experiment to detect stealth physics. This refers to dynamics beyond the standard model that would elude searches that focus on energetic objects or precision measurements of known processes. Stealth signatures include long-lived particles and light resonances that are produced very rarely or together with overwhelming backgrounds. We will discuss why LHCb is equipped to discover this kind of physics at the Large Hadron Collider and provide examples of well-motivated theoretical models that can be probed with great detail at the experiment.
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3.
  • Welch, C. C., et al. (författare)
  • Formation of nanoscale structures by inductively coupled plasma etching
  • 2012
  • Ingår i: International Conference Micro- and Nano-Electronics 2012. - : SPIE - International Society for Optical Engineering. - 9780819494870 ; , s. 870002-
  • Konferensbidrag (refereegranskat)abstract
    • This paper will review the top down technique of ICP etching for the formation of nanometer scale structures. The increased difficulties of nanoscale etching will be described. However it will be shown and discussed that inductively coupled plasma (ICP) technology is well able to cope with the higher end of the nanoscale: features from 100nm down to about 40nm are relatively easy with current ICP technology. It is the ability of ICP to operate at low pressure yet with high plasma density and low (controllable) DC bias that helps greatly compared to simple reactive ion etching (RIE) and, though continual feature size reduction is increasingly challenging, improvements to ICP technology as well as improvements in masking are enabling sub-10nm features to be reached. Nanoscale ICP etching results will be illustrated in a range of materials and technologies. Techniques to facilitate etching (such as the use of cryogenic temperatures) and techniques to improve the mask performance will be described and illustrated.
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4.
  • Qin, C., et al. (författare)
  • Study of sigma-shaped source/drain recesses for embedded-SiGe pMOSFETs
  • 2017
  • Ingår i: Microelectronic Engineering. - : Elsevier. - 0167-9317 .- 1873-5568. ; 181, s. 22-28
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, the manufacturing process and formation mechanism study of sigma-shaped source/drain (S/D) recess in 28 nm node pMOSFETs and beyond have been presented. The mechanism of forming sigma-shaped recesses included a detailed analysis how to apply the dry and wet etching to shape the recess in a controlled way. The key factors in etching parameters were identified and optimized. Simulations of strain distributions in the channel region of the devices with selectively grown Si0.65Ge0.35 on different S/D recess shapes were carried out and the results were used as feedback to find out a trade-off between maximum strain in the channel region of the transistors and low short channel effect. Finally, guidelines for designing the shape of recess and for tuning the etching parameters for high mobility transistors have been proposed.
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5.
  • Radamson, Henry H., et al. (författare)
  • Optimization of Selective Growth of SiGe for Source/Drain in 14nm and beyond Nodes FinFETs
  • 2017
  • Ingår i: International Journal of High Speed Electronics and Systems. - : World Scientific Publishing Co. Pte Ltd. - 0129-1564. ; 26:1-2
  • Tidskriftsartikel (refereegranskat)abstract
    • In this work, optimization of selective epitaxy growth (SEG) of SiGe layers on source/drain (S/D) areas in 14nm node FinFETs with high-k & metal gate has been presented. The Ge content in epilayers was in range of 30%-40% with boron concentration of 1-3 × 1020 cm-3. The strain distribution in the transistor structure due to SiGe as stressor material in S/D was simulated and these results were used as feedback to design the layer profile. The epitaxy parameters were optimized to improve the layer quality and strain amount of SiGe layers. The in-situ cleaning of Si fins was crucial to grow high quality layers and a series of experiments were performed in range of 760-825 °C. The results demonstrated that the thermal budget has to be within 780-800 °C in order to remove the native oxide but also to avoid any harm to the shape of Si fins. The Ge content in SiGe layers was directly determined from the misfit parameters obtained from reciprocal space mappings using synchrotron radiation. Atomic layer deposition (ALD) technique was used to deposit HfO2 as high-k dielectric and B-doped W layer as metal gate to fill the gate trench. This type of ALD metal gate has decent growth rate, low resistivity and excellent capability to fill the gate trench with high aspect-ratio. Finally, the electrical characteristics of fabricated FinFETs were demonstrated and discussed.
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6.
  • Wang, G., et al. (författare)
  • Impact of pattern dependency of SiGe layers grown selectively in source/drain on the performance of 22 nm node pMOSFETs
  • 2015
  • Ingår i: Solid-State Electronics. - : Elsevier. - 0038-1101 .- 1879-2405. ; 114, s. 43-48
  • Tidskriftsartikel (refereegranskat)abstract
    • Pattern dependency of selective epitaxy of Si1-xGex (0.20 ≤ x ≤ 0.45) grown in recessed source/drain regions of 22 nm pMOSFETs has been studied. A complete substrate mapping over 200 mm wafers was performed and the transistors' characteristics were measured. The designed SiGe profile included a layer with Ge content of 40% at the bottom of recess (40 nm) and capped with 20% Ge as a sacrificial layer (20 nm) for silicide formation. The induced strain in the channel was simulated before and after silicidation. The variation of strain was localized and its effect on the transistors' performance was determined. The chips had a variety of SiGe profile depending on their distance (closest, intermediate and central) from the edge of the 200 mm wafer. SiGe layers with poor epi-quality were observed when the coverage of exposed Si of the chip was below 1%. This causes high Ge contents with layer thicknesses above the critical thickness.
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7.
  • Wang, G., et al. (författare)
  • Integration of selective epitaxial growth of SiGe/Ge layers in 14nm node FinFETs
  • 2016
  • Ingår i: ECS Transactions. - : Electrochemical Society Inc.. - 1938-5862 .- 1938-6737. - 9781607685395 ; , s. 273-279
  • Konferensbidrag (refereegranskat)abstract
    • In this study, the process integration of SiGe selective epitaxy on source/drain and SiGe/Ge bilayers selectively epitaxy on replacement Si channel regions for 14 nm node FinFETs has been presented. The epi-quality, layer profile and strain amount of the selectively grown SiGe and Ge layers were also investigated by means of various characterization tools. A series of prebaking experiments were performed for different temperatures in order to in-situ clean the Si fins prior to the SiGe S/D epitaxy. It was also found that a SiGe layer with graded Ge content was deposited as the strain relaxed buffer (SRB) layer in the channel trench prior to the Ge layer filling in the small trenches to make the void defect free.
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8.
  • Wiedorn, Max O., et al. (författare)
  • Megahertz serial crystallography
  • 2018
  • Ingår i: Nature Communications. - : Nature Publishing Group. - 2041-1723. ; 9
  • Tidskriftsartikel (refereegranskat)abstract
    • The new European X-ray Free-Electron Laser is the first X-ray free-electron laser capable of delivering X-ray pulses with a megahertz inter-pulse spacing, more than four orders of magnitude higher than previously possible. However, to date, it has been unclear whether it would indeed be possible to measure high-quality diffraction data at megahertz pulse repetition rates. Here, we show that high-quality structures can indeed be obtained using currently available operating conditions at the European XFEL. We present two complete data sets, one from the well-known model system lysozyme and the other from a so far unknown complex of a beta-lactamase from K. pneumoniae involved in antibiotic resistance. This result opens up megahertz serial femtosecond crystallography (SFX) as a tool for reliable structure determination, substrate screening and the efficient measurement of the evolution and dynamics of molecular structures using megahertz repetition rate pulses available at this new class of X-ray laser source.
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9.
  • Qin, C., et al. (författare)
  • A novel method for source/drain ion implantation for 20 nm FinFETs and beyond
  • 2020
  • Ingår i: Journal of materials science. Materials in electronics. - : Springer Science and Business Media LLC. - 0957-4522 .- 1573-482X. ; 31, s. 98-104
  • Tidskriftsartikel (refereegranskat)abstract
    • This paper presents a method to improve source/drain extension (SDE) ion implantation (I/I) process for sub-20 nm node FinFETs with no extra step in transistor process. Traditionally, SDE I/I process needs a large implant tilt angle and a high dose to obtain a heavy and conformal doping. However, this process leads to implantation shadow effects and Si-fin amorphization. These drawbacks can be removed in our new approach when SDE I/I is modified and moved after S/D epitaxy process (SDE I/I-last). Because of the facet planes of the SiGe layer, the ions are allowed to be implanted with small tilt. This is helpful to avoid shadow effects of implantation and to keep the low defect density in the S/D. As a result, the external resistance (R EXTRNL ) is not high and the strain relaxation is minor in S/D epitaxy layer. Finally, p-type FinFETs with 25 nm gate length with SDE I/I-last are fabricated. These new FinFETs demonstrate ~ 50% on-state current (I ON ) improvement compared to those transistors fabricated by traditional method.
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10.
  • Radamson, Henry H., et al. (författare)
  • Optimization of Selective Growth of SiGe for Source/Drain in 14nm and Beyond Nodes FinFETs
  • 2017
  • Ingår i: Scaling and Integration of High-Speed Electronics and Optomechanical Systems. - : World Scientific Pub Co Pte Ltd. ; , s. 99-107
  • Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
    • In this work, optimization of selective epitaxy growth (SEG) of SiGe layers on source/drain (S/D) areas in 14nm node FinFETs with high-k and metal gate has been presented. The Ge content in epilayers was in range of 30%-40% with boron concentration of 1-3 × 1020 cm-3. The strain distribution in the transistor structure due to SiGe as stressor material in S/D was simulated and these results were used as feedback to design the layer profile. The epitaxy parameters were optimized to improve the layer quality and strain amount of SiGe layers. The in-situ cleaning of Si fins was crucial to grow high quality layers and a series of experiments were performed in range of 760-825 °C. The results demonstrated that the thermal budget has to be within 780-800 °C in order to remove the native oxide but also to avoid any harm to the shape of Si fins. The Ge content in SiGe layers was directly determined from the misfit parameters obtained from reciprocal space mappings using synchrotron radiation. Atomic layer deposition (ALD) technique was used to deposit HfO2 as high-k dielectric and B-doped W layer as metal gate to fill the gate trench. This type of ALD metal gate has decent growth rate, low resistivity and excellent capability to fill the gate trench with high aspect-ratio. Finally, the electrical characteristics of fabricated FinFETs were demonstrated and discussed. 
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  • Resultat 1-10 av 30

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