| 1. |
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- 2019
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Tidskriftsartikel (refereegranskat)
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| 2. |
- Hambäck, Peter A., et al.
(författare)
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Tradeoffs and synergies in wetland multifunctionality : A scaling issue
- 2023
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Ingår i: Science of the Total Environment. - Amsterdam : Elsevier. - 0048-9697 .- 1879-1026. ; 862
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Forskningsöversikt (refereegranskat)abstract
- Wetland area in agricultural landscapes has been heavily reduced to gain land for crop production, but in recent years there is increased societal recognition of the negative consequences from wetland loss on nutrient retention, biodiver-sity and a range of other benefits to humans. The current trend is therefore to re-establish wetlands, often with an aim to achieve the simultaneous delivery of multiple ecosystem services, i.e., multifunctionality. Here we review the liter-ature on key objectives used to motivate wetland re-establishment in temperate agricultural landscapes (provision of flow regulation, nutrient retention, climate mitigation, biodiversity conservation and cultural ecosystem services), and their relationships to environmental properties, in order to identify potential for tradeoffs and synergies concerning the development of multifunctional wetlands. Through this process, we find that there is a need for a change in scale from a focus on single wetlands to wetlandscapes (multiple neighboring wetlands including their catchments and surround-ing landscape features) if multiple societal and environmental goals are to be achieved. Finally, we discuss the key fac-tors to be considered when planning for re-establishment of wetlands that can support achievement of a wide range of objectives at the landscape scale.
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| 3. |
- Hertz, Erik, 1956-, et al.
(författare)
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A Methodology for Parabolic Synthesis
- 2010
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Ingår i: VLSI. - Vukovar, Croatia : InTech. - 9789533070490 ; , s. 199-220
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Bokkapitel (refereegranskat)
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| 4. |
- Hertz, Erik, 1956-, et al.
(författare)
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A Methodology for parabolic synthesis of unary functions for hardware implementation
- 2008
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Ingår i: SCS 2008. - New York : Institute of Electrical and Electronics Engineers (IEEE). - 9781424426270
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Konferensbidrag (refereegranskat)abstract
- This paper introduces a parabolic synthesis methodology for developing approximations of unary functions like trigonometric functions and logarithms which are specialized for efficient hardware mapped VLSI design. The advantages with the methodology are, short critical path, fast computation and high throughput enabled by a high degree of architectural parallelism. The feasibility of the methodology is shown by developing an approximation of the sine function for implementation in hardware. © 2008 IEEE
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| 5. |
- Hertz, Erik, 1956-, et al.
(författare)
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Algorithms for implementing roots, inverse and inverse roots in hardware
- 2016
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Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- In applications as in future MIMO communication systems a massive computation of complex matrix operations, such as QR decomposition, is performed. In these matrix operations, the functions roots, inverse and inverse roots are computed in large quantities. Therefore, to obtain high enough performance in such applications, efficient algorithms are highly important. Since these algorithms need to be realized in hardware it must also be ensured that they meet high requirements in terms of small chip area, low computation time and low power consumption. Power consumption is particularly important since many applications are battery powered.For most unary functions, directly applying an approximation methodology in a straightforward way will not lead to an efficient implementation. Instead, a dedicated algorithm often has to be developed. The functions roots, inverse and inverse roots are in this category. The developed approaches are founded on working in a floating-point format. For the roots functions also a change of number base is used. These procedures not only enable simpler solutions but also increased accuracy, since the approximation algorithm is performed on a mantissa of limited range.As a summarizing example the inverse square root is chosen. For comparison, the inverse square root is implemented using two methodologies: Harmonized Parabolic Synthesis and Newton-Raphson method. The novel methodology, Harmonized Parabolic Synthesis (HPS), is chosen since it has been demonstrated to provide very efficient approximations. The Newton-Raphson (NR) method is chosen since it is known for providing a very efficient implementation of the inverse square root. It is also commonly used in signal processing applications for computing approximations on fixed-point numbers of a limited range. Four implementations are made; HPS with 32 and 512 interpolation intervals and NR with 1 and 2 iterations. Summarizing the comparisons of the hardware performance, the implementations HPS 32, HPS 512 and NR 1 are comparable when it comes to hardware performance, while NR 2 is much worse. However, HPS 32 stands out in terms of better performance when it comes to the distribution of the error.
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| 6. |
- Hertz, Erik, 1956-, et al.
(författare)
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Combining the parabolic synthesis methodology with second-degree interpolation
- 2016
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Ingår i: Microprocessors and Microsystems. - Amsterdam : Elsevier BV. - 0141-9331 .- 1872-9436. ; 42, s. 142-155
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Tidskriftsartikel (refereegranskat)abstract
- The Parabolic Synthesis methodology is an approximation methodology for implementing unary functions, such as trigonometric functions, logarithms and square root, as well as binary functions, such as division, in hardware. Unary functions are extensively used in baseband for wireless/wireline communication, computer graphics, digital signal processing, robotics, astrophysics, fluid physics, games and many other areas. For high-speed applications, as well as in low-power systems, software solutions are not sufficient and a hardware implementation is therefore needed. The Parabolic Synthesis methodology is a way to implement functions in hardware based on low complexity operations that are simple to implement in hardware. A difference in the Parabolic Synthesis methodology compared to many other approximation methodologies is that it is a multiplicative, in contrast to additive, methodology. To further improve the performance of Parabolic Synthesis based designs, the methodology is combined with Second-Degree Interpolation. The paper shows that the methodology provides a significant reduction in chip area, computation delay and power consumption with preserved characteristics of the error. To evaluate this, the logarithmic function was implemented, as an example, using the Parabolic Synthesis methodology in comparison to the Parabolic Synthesis methodology combined with Second-Degree Interpolation. To further demonstrate the feasibility of both methodologies, they have been compared with the CORDIC methodology. The comparison is made on the implementation of the fractional part of the logarithmic function with a 15-bit resolution. The designs implemented using the Parabolic Synthesis methodology - with and without the Second-Degree Interpolation - perform 4x and 8x better, respectively, than the CORDIC implementation in terms of throughput. In terms of energy consumption, the CORDIC implementation consumes 140% and 800% more energy, respectively. The chip area is also smaller in the case when the Parabolic Synthesis methodology combined with Second-Degree Interpolation is used.
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| 7. |
- Hertz, Erik, 1956-
(författare)
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Methodologies for Approximation of Unary Functions and Their Implementation in Hardware
- 2016
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Applications in computer graphics, digital signal processing, communication systems, robotics, astrophysics, fluid physics and many other areas have evolved to become very computation intensive. Algorithms are becoming increasingly complex and require higher accuracy in the computations. In addition, software solutions for these applications are in many cases not sufficient in terms of performance. A hardware implementation is therefore needed. A recurring bottleneck in the algorithms is the performance of the approximations of unary functions, such as trigonometric functions, logarithms and the square root, as well as binary functions such as division. The challenge is therefore to develop a methodology for the implementation of approximations of unary functions in hardware that can cope with the growing requirements. The methodology is required to result in fast execution time, low complexity basic operations that are simple to implement in hardware, and – sincemany applications are battery powered – low power consumption. To ensure appropriate performance of the entire computation in which the approximation is a part, the characteristics and distribution of the approximation error are also things that must be possible to manage. The new approximation methodologies presented in this thesis are of the type that aims to reduce the sizes of the look-up tables by the use of auxiliary functions. They are founded on a synthesis of parabolic functions by multiplication – instead of addition, which is the most common. Three approximation methodologies have been developed; the two last being further developments of the first. For some functions, such as roots, inverse and inverse roots, a straightforward solution with an approximation is not manageable. Since these functions are frequent in many computation intensive algorithms, it is necessary to find very efficient implementations of these functions. New methods for this are also presented in this thesis. They are all founded on working in a floating-point format, and, for the roots functions, a change of number base is also used. The transformations not only enable simpler solutions but also increased accuracy, since the approximation algorithm is performed on a mantissa of limited range. Tools for error analysis have been developed as well. The characteristics and distribution of the approximation error in the new methodologies are presented and compared with existing state-of-the-art methods such as CORDIC. The verification and evaluation of the solutions have to a large extent been made as comparative ASIC implementations with other approximation methods, separately or embedded in algorithms. As an example, an implementation of the logarithm made using the third methodology developed, Harmonized Parabolic Synthesis (HPS), is compared with an implementation using the CORDIC algorithm. Both implementations are designed to provide 15-bit resolution. The design implemented using HPS performs 12 times better than the CORDIC implementation in terms of throughput. In terms of energy consumption, the new methodology consumes 96% less. The chip area is 60% smaller than for the CORDIC algorithm. In summary, the new approximation methodologies presented are found to well meet the demanding requirements that exist in this area.
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| 8. |
- Hertz, Erik, 1956-
(författare)
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Parabolic Synthesis
- 2011
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Many consumer products, such as within the computer areas, computer graphics, digital signal processing, communication systems, robotics, navigation, astrophysics, fluid physics, etc. are searching for high computational performance as a consequence of increasingly more advanced algorithms in these applications. Until recently the down scaling of the hardware technology has been able to fulfill these higher demands from the more advanced algorithms with higher clock rates on the chips. This that the development of hardware technology performance has stagnated has moved the interest more over to implementation of algorithms in hardware. Especially within wireless communication the desire for higher transmission rates has increased the interest for algorithm implementation methodologies. The scope of this thesis is mainly on the developed methodology of parabolic synthesis. The parabolic synthesis methodology is a methodology for implementing approximations of unary functions in hardware. The methodology is described with the criteria's that have to be fulfilled to perform an approximation on a unary function. The hardware architecture of the methodology is described and to this a special hardware that performs the squaring operation. The outcome of the presented research is a novel methodology for implementing approximations of unary functions such as trigonometric functions, logarithmic functions, as well as square root and division functions etc. The architecture of the processing part automatically gives a high degree of parallelism. The methodology is founded on operations that are simple to implement in hardware such as addition, shifts, multiplication, contributes to that the implementation in hardware is simple to perform. The hardware architecture is characterized by a high degree of parallelism that gives a short critical path and fast computation. The structure of the methodology will also assure an area efficient hardware implementation.
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| 9. |
- Hertz, Erik, 1956-, et al.
(författare)
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Parabolic Synthesis Methodology
- 2010
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Konferensbidrag (refereegranskat)abstract
- This paper introduces a parabolic synthesis methodology for developing approximations of unary functions. Examples are trigonometric functions and logarithms as well as square root and division functions. They are extensively used and specialized for efficient hardware mapped VLSI design. The advantages with the methodology are, short critical path, fast computation and high throughput enabled by a high degree of architectural parallelism. The feasibility of the methodology is shown by developing an approximation of the sine function for implementation in hardware.
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| 10. |
- Hertz, Erik, 1956-, et al.
(författare)
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Parabolic Synthesis Methodology Implemented on the Sine Function
- 2009
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Ingår i: IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009.. - 9781424438273 ; , s. 253-256
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Konferensbidrag (refereegranskat)abstract
- This paper introduces a parabolic synthesis methodology for implementation of approximations of unary functions like trigonometric functions and logarithms, which are specialized for efficient hardware mapped VLSI design. The advantages with the methodology are, short critical path, fast computation and high throughput enabled by a high degree of architectural parallelism. The feasibility of the methodology is shown by developing an approximation of the sine function for implementation in hardware. ©2009 IEEE.
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