| 1. |
- Jantsch, A, et al.
(författare)
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Comparison of Six Languages for System Level Descriptions of Telecom Systems
- 2001
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Ingår i: Electronic Chips & Systems Design Languages. - Boston, Mass. : Kluwer Academic Publishers. - 0792373111 ; , s. 320-
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Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
- Language evaluation for various purposes is an often repeated exercise in industry and academia. Due to the large number of influencing factors the dependence of the result on implicit or explicit assumptions is not always apparent and clear. Based on a systematic evaluation method with a large number of criteria we compare six languages with respect to the suitability as a system specification and description language for telecom applications. The languages under evaluation are VHDL, C++, SDL, Haskell, Erlang, and ProGram, which represent different paradigms. The evaluation method allows to give specific emphasis on particular aspects in a controlled way, which we use to make separate comparisons for pure software systems, pure hardware systems and mixed HW/SW systems.
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| 2. |
- Jantsch, A, et al.
(författare)
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Conparison of six languages for system level descriptions of telecom systems
- 1998
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Ingår i: Proceedings / FDL'98 / First International Forum on Design Languages. - Lausanne : Swiss Federal Inst. Of techn.. ; , s. 160-
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Konferensbidrag (refereegranskat)abstract
- Language evaluation for various purposes is an often repeated exercise in industry and academia. Due to the large number of influencing factors the dependence of the result on implicit or explicit assumptions is not always apparent and clear. Based on a systematic evaluation method with a large number of criteria we compare six languages with respect to the suitability as a system specification and description language for telecom applications. The languages under evaluation are VHDL, C++, SDL, Haskell, Erlang, and ProGram, which represent different paradigms. The evaluation method allows to give specific emphasis on particular aspects in a controlled way, which we use to make separate comparisons for pure software systems, pure hardware systems and mixed HW/SW systems.
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| 3. |
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| 4. |
- O'Nils, Mattias, et al.
(författare)
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Interactive Hardware-Software Partitioning and Memory Allocation Based on Data Transfer Profiling
- 1995
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Ingår i: International Conference on Recent Advances in Mechantronics. ICRAM '95, 14-16 Aug. 1995 , Istanbul, Turkey. - 975 518 063 X ; , s. 447-452
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Konferensbidrag (refereegranskat)abstract
- This paper deals with the problems of memory allocation and partitioning in hardware/software codesign. We present two algorithms to solve these problems. First a memory allocation algorithm for minimizing memory traffic is presented. The memory allocations are performed based upon data transfer profiling information captured with an extension to the Gnu C compiler. A partitioning algorithm is then presented which is used to partition the C/C++ specification into behavioural VHDL and object code, the partitioning algorithm decisions are based upon information from memory allocation, execution profiling and hardware estimations. The partitioning process is made interactive by allowing the user to control how a specific object should be implemented. We present results from two examples: One calculating the Fibonacchi numbers and one implementing the operation and maintenance functionality of the ATM protocol. We observe that taking data transfer information into account can lead to 50% performance improvement.
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| 5. |
- Tammemäe, K., et al.
(författare)
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AKKA : A Codesign Environment
- 1995
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Ingår i: The 13th NORCHIP Conference. ; , s. 249-
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)
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| 6. |
- Tammemäe, K, et al.
(författare)
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Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems
- 1996
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Ingår i: Proceedings. 6th International Workshop on Field-Programmable Logic, FPL '96, Darmstadt, Germany, September 23-25, 1996. - : Springer. - 3540617302 ; , s. 193-199
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Konferensbidrag (refereegranskat)abstract
- We present an architecture for rapid prototyping of selected controldominated HW parts resulting from HW/SW cosynthesis. Our codesign toolkit AKKA[1], which targets to design of control intensive systems, consists of design space exploration, estimation, partitioning, cosimulation and verification subtools in common environment. For fast prototyping of HW parts an EVC board with Xilinx XC4013 FPGA is used. We describe an multifunctional architecture, programmable into the FPGA, consisting of reusable interface/memory section and synthesized functional part. Usability of architecture in client-server relationship is described.
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