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Träfflista för sökning "WFRF:(Johansson Lars Erik) ;pers:(Egard Mikael)"

Sökning: WFRF:(Johansson Lars Erik) > Egard Mikael

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  • Egard, Mikael, et al. (författare)
  • Vertical InAs nanowire wrap gate transistors with f(t) > 7 GHz and f(max) > 20 GHz.
  • 2010
  • Ingår i: Nano Letters. - The American Chemical Society. - 1530-6992. ; 10:3, s. 809-812
  • Tidskriftsartikel (refereegranskat)abstract
    • In this letter we report on high-frequency measurements on vertically standing III-V nanowire wrap-gate MOSFETs (metal-oxide-semiconductor field-effect transistors). The nanowire transistors are fabricated from InAs nanowires that are epitaxially grown on a semi-insulating InP substrate. All three terminals of the MOSFETs are defined by wrap around contacts. This makes it possible to perform high-frequency measurements on the vertical InAs MOSFETs. We present S-parameter measurements performed on a matrix consisting of 70 InAs nanowire MOSFETs, which have a gate length of about 100 nm. The highest unity current gain cutoff frequency, f(t), extracted from these measurements is 7.4 GHz and the maximum frequency of oscillation, f(max), is higher than 20 GHz. This demonstrates that this is a viable technique for fabricating high-frequency integrated circuits consisting of vertical nanowires.
  • Lind, Erik, et al. (författare)
  • High Frequency Performance of Vertical InAs Nanowire MOSFET
  • 2010
  • Ingår i: 2010 22Nd International Conference On Indium Phosphide And Related Materials (Iprm). - IEEE--Institute of Electrical and Electronics Engineers Inc.. - 1092-8669. - 978-1-4244-5919-3
  • Konferensbidrag (refereegranskat)abstract
    • We report on RF characterization of vertical, 100-nm-gate length InAs nanowire MOSFETs, utilizing wrap-gate technology and Al2O3 high-kappa gate oxide. The transistors show f(t)=5.6 GHz and f(max)=22 GHz, mainly limited by parasitic capacitances. The RF device performance is described using a hybrid-pi model taking hole generation at the drain into account. Electrostatic modeling of the parasitic capacitances for arrays of vertical nanowires indicates that a strong reduction in extrinsic capacitances can be achieved for devices with a small inter-wire separation.
  • Roll, Guntrade, et al. (författare)
  • RF and DC Analysis of Stressed InGaAs MOSFETs
  • 2014
  • Ingår i: IEEE Electron Device Letters. - IEEE--Institute of Electrical and Electronics Engineers Inc.. - 0741-3106. ; 35:2, s. 181-183
  • Tidskriftsartikel (populärvet., debatt m.m.)abstract
    • A complete reliability study of the DC and RF characteristics for InGaAs nMOSFETs with aluminium oxide/ hafnium oxide dielectric is presented. The main stress variation at high frequencies is related to a threshold voltage shift, whereas no decrease is found in the maximum of the cut-off frequency and RF-transconductance. Constant gate stress leads to a charge build up causing a threshold voltage shift. Furthermore, electron trapping at the drain side degrades the performance after hot carrier stress. The maximum DC-transconductance is reduced following constant gate bias stress, by an increase in charge trapping at border defects. These border defects at the channel/high-k interface are filled by cold carrier trapping when the transistor is turned on, whereas they do not respond at high frequencies.
  • Johansson, Sofia, et al. (författare)
  • High frequency vertical InAs nanowire MOSFETs integrated on Si substrates
  • 2012
  • Ingår i: Physica Status Solidi. C, Current Topics in Solid State Physics. - John Wiley & Sons. - 1610-1634. ; 9:2, s. 350-353
  • Tidskriftsartikel (refereegranskat)abstract
    • RF and DC characterization of vertical InAs nanowire MOSFET on Si substrates are presented. Nanowire arrays are epitaxially integrated on Si substrates by use of a thin InAs buffer layer. For device fabrication, high-k HfO2 gate dielectric and wrap-gates are used. Post-deposition annealing of the high-k is evaluated by comparing one annealed and one not-annealed sample. The annealed sample show better DC characteristics in terms of transconductance, g(m) = 155 mS/mm, and on-current, I-on = 550 mA/mm. Box plots of on-current, on-resistance and transconductance for all 190-nanowire-array transistors on the annealed sample suggest that the electrical properties of the nanowires are preserved when scaling the nanowire diameter. Finally, high frequency characterisation yields a unity current gain cut-off frequency of f(t) = 9.3 GHz for the annealed sample and f(t) = 2.0 GHz for the not-annealed sample. (C) 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
  • Johansson, Sofia, et al. (författare)
  • RF Characterization of Vertical InAs Nanowire Wrap-Gate Transistors Integrated on Si Substrates
  • 2011
  • Ingår i: IEEE Transactions on Microwave Theory and Techniques. - IEEE--Institute of Electrical and Electronics Engineers Inc.. - 0018-9480. ; 59:10, s. 2733-2738
  • Tidskriftsartikel (refereegranskat)abstract
    • We present dc and RF characterization of InAs nanowire field-effect transistors (FETs) heterogeneously integrated on Si substrates in a geometry suitable for circuit applications. The FET consists of an array of 182 vertical InAs nanowires with about 6-nm HfO high-gate dielectric and a wrap-gate length of 250 nm. The transistor has a transconductance of 155 mS/mm and an on-current of 550 mA/mm at a gate voltage of 1.5 V and a drain voltage of 1 V. S-parameter measurements yield an extrinsic cutoff frequency of 9.3 GHz and a extrinsic maximum oscillation frequency of 14.3 GHz.
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