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- Karltun, Johan, et al.
(författare)
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Schedulers’ work activities and decision making influencing working conditions of other employees
- 2002
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Ingår i: Proceedings of the 34th Annual Congress of the Nordic Ergonomics Society : Humans in a Complex Environment. - 91-7373-444-6 ; s. 435-440
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Konferensbidrag (populärvet., debatt m.m.)abstract
- The coordination character of production scheduling gives schedulers strong links to other people in the organization such as production management and sales- and marketing personnel. Schedulers and the way scheduling is performed may thus have a direct influence on the working conditions for a large number of employees. The objective of this paper is therefore to investigate the links between how schedulers perform their work and the working conditions of other employees. Activity analysis, including observations and interviews was used to study schedulers’ influence in four woodworking companies. The results showed that the most important factor for other employees was the feasibility of the schedule related to their own tasks. Schedulers were to a large extent expected to know the certain and sometimes temporal difficulties related to each departments’ technology and manning, and to consider those when making the schedule. By doing so the scheduler indirectly influenced the workload and the capacity of the whole system. Furthermore, the employees perceived that they were able to influence the schedule when they were in difficulties. The main conclusion is that the schedulers’ roles as system facilitators dominate their influence on the working conditions in the companies studied.
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| 2. |
- Kumar, Shashi, et al.
(författare)
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A network on chip architecture and design methodology
- 2002
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Ingår i: VLSI 2002 : IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI - NEW PARADIGMS FOR VLSI SYSTEMS DESIGN. - IEEE conference proceedings. - 0-7695-1486-3 ; s. 105-112
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Konferensbidrag (refereegranskat)abstract
- We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NOC), includes both the architecture and the design methodology. The NOC architecture is a m x n mesh of switches and resources are placed on the slots formed by the switches. We assume a direct layout of the 2-D mesh of switches and resources providing physical- architectural level design integration. Each switch is connected to one resource and four neighboring switches, and each resource is connected to one switch. A resource can be a processor core, memory, an FPGA, a custom hardware block or any other intellectual property (LP) block, which fits into the available slot and complies with the interface of the NOC. The NOC architecture essentially is the onchip communication infrastructure comprising the physical layer, the data link layer and the network layer of the OSI protocol stack. We define the concept of a region, which occupies an area of any number of resources and switches. This concept allows the NOC to accommodate large resources such as large memory banks, FPGA areas, or special purpose computation resources such as high performance multiprocessors. The NOC design methodology consists of two phases. In the first phase a concrete architecture is derived from the general NOC template. The concrete architecture defines the number of switches and shape of the network, the kind and shape of regions and the number and kind of resources. The second phase maps the application onto the concrete architecture to form a concrete product.
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