| 1. |
- Magnusson, Peter S., et al.
(författare)
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SimICS/sun4m : A virtual workstation
- 2019
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Ingår i: USENIX 1998 Annual Technical Conference. - New Orleans, LA, USA : USENIX Association.
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Konferensbidrag (refereegranskat)abstract
- System level simulators allow computer architects and system software designers to recreate an accurate and complete replica of the program behavior of a target system, regardless of the availability, existence, or instrumentation support of such a system. Applications include evaluation of architectural design alternatives as well as software engineering tasks such as traditional debugging and performance tuning. We present an implementation of a simulator acting as a virtual workstation fully compatible with the sun4m architecture from Sun Microsystems. Built using the system-level SPARC V8 simulator SimICS, SimICS/sun4m models one or more SPARC V8 processors, supports user-developed modules for data cache and instruction cache simulation and execution profiling of all code, and provides a symbolic and performance debugging environment for operating systems. SimICS/sun4m can boot unmodified operating systems, including Linux 2.0.30 and Solaris 2.6, directly from snapshots of disk partitions. To support essentially arbitrary code, we implemented binary-compatible simulators for several devices, including SCSI, console, interrupt, timers, EEPROM, and Ethernet. The Ethernet simulation hooks into the host and allows the virtual workstation to appear on the local network with full services available (NFS, NIS, rsh, etc). Ethernet and console traffic can be recorded for future playback. The performance of SimICS/sun4m is sufficient to run realistic workloads, such as the database benchmark TPC-D, scaling factor 1/100, or an interactive network application such as Mozilla. The slowdown in relation to native hardware is in the range of 25 to 75 (measured using SPECint95). We also demonstrate some applications, including modeling an 8-processor sun4m version (which does not exist), modeling future memory hierarchies, and debugging an operating system.
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| 2. |
- Westphal, Florian
(författare)
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Data and Time Efficient Historical Document Analysis
- 2020
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Over the last decades companies and government institutions have gathered vast collections of images of historical handwritten documents. In order to make these collections truly useful to the broader public, images suffering from degradations, such as faded ink, bleed through or stains, need to be made readable and the collections as a whole need to be made searchable. Readability can be achieved by separating text foreground from page background using document image binarization, while searchability by search string or by example image can be achieved through word spotting. Developing algorithms with reasonable binarization or word spotting performance is a difficult task. Additional challenges are to make these algorithms execute fast enough to process vast collections of images in a reasonable amount of time, and to enable them to learn from few labeled training samples. In this thesis, we explore heterogeneous computing, parameter prediction, and enhanced throughput as ways to reduce the execution time of document image binarization algorithms. We find that parameter prediction and mapping a heuristics based binarization algorithm to the GPU lead to an 1.7 and 3.5 increase in execution performance respectively. Furthermore, we identify for a learning based binarization algorithm using recurrent neural networks the number of pixels processed at once as way to trade off execution time with binarization quality. The achieved increase in throughput results in a 3.8 times faster overall execution time. Additionally, we explore guided machine learning (gML) as a possible approach to reduce the required amount of training data for learning based algorithms for binarization, character recognition and word spotting. We propose an initial gML system for binarization, which allows a user to improve an algorithm’s binarization quality by selecting suitable training samples. Based on this system, we identify and pursue three different directions, viz., formulation of a clear definition of gML, identification of an efficient knowledge transfer mechanism from user to learner, and automation of sample selection. We explore the Learning Using Privileged Information paradigm as a possible knowledge transfer mechanism by using character graphs as privileged information for training a neural network based character recognizer. Furthermore, we show that, given a suitable word image representation, automatic sample selection can help to reduce the amount of training data required for word spotting by up to 69%.
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| 3. |
- Westphal, Florian
(författare)
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Efficient Document Image Binarization using Heterogeneous Computing and Interactive Machine Learning
- 2018
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Large collections of historical document images have been collected by companies and government institutions for decades. More recently, these collections have been made available to a larger public via the Internet. However, to make accessing them truly useful, the contained images need to be made readable and searchable. One step in that direction is document image binarization, the separation of text foreground from page background. This separation makes the text shown in the document images easier to process by humans and other image processing algorithms alike. While reasonably well working binarization algorithms exist, it is not sufficient to just being able to perform the separation of foreground and background well. This separation also has to be achieved in an efficient manner, in terms of execution time, but also in terms of training data used by machine learning based methods. This is necessary to make binarization not only theoretically possible, but also practically viable.In this thesis, we explore different ways to achieve efficient binarization in terms of execution time by improving the implementation and the algorithm of a state-of-the-art binarization method. We find that parameter prediction, as well as mapping the algorithm onto the graphics processing unit (GPU) help to improve its execution performance. Furthermore, we propose a binarization algorithm based on recurrent neural networks and evaluate the choice of its design parameters with respect to their impact on execution time and binarization quality. Here, we identify a trade-off between binarization quality and execution performance based on the algorithm’s footprint size and show that dynamically weighted training loss tends to improve the binarization quality. Lastly, we address the problem of training data efficiency by evaluating the use of interactive machine learning for reducing the required amount of training data for our recurrent neural network based method. We show that user feedback can help to achieve better binarization quality with less training data and that visualized uncertainty helps to guide users to give more relevant feedback.
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| 4. |
- Westphal, Florian, et al.
(författare)
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A case for guided machine learning
- 2019
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Ingår i: Machine learning and knowledge extraction. - Cham : Springer. - 9783030297251 - 9783030297268 ; , s. 353-361
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Konferensbidrag (refereegranskat)abstract
- Involving humans in the learning process of a machine learning algorithm can have many advantages ranging from establishing trust into a particular model to added personalization capabilities to reducing labeling efforts. While these approaches are commonly summarized under the term interactive machine learning (iML), no unambiguous definition of iML exists to clearly define this area of research. In this position paper, we discuss the shortcomings of current definitions of iML and propose and define the term guided machine learning (gML) as an alternative.
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| 5. |
- Abghari, Shahrooz, et al.
(författare)
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Higher order mining for monitoring district heating substations
- 2019
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Ingår i: Proceedings - 2019 IEEE International Conference on Data Science and Advanced Analytics, DSAA 2019. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781728144931 ; , s. 382-391
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Konferensbidrag (refereegranskat)abstract
- We propose a higher order mining (HOM) approach for modelling, monitoring and analyzing district heating (DH) substations' operational behaviour and performance. HOM is concerned with mining over patterns rather than primary or raw data. The proposed approach uses a combination of different data analysis techniques such as sequential pattern mining, clustering analysis, consensus clustering and minimum spanning tree (MST). Initially, a substation's operational behaviour is modeled by extracting weekly patterns and performing clustering analysis. The substation's performance is monitored by assessing its modeled behaviour for every two consecutive weeks. In case some significant difference is observed, further analysis is performed by integrating the built models into a consensus clustering and applying an MST for identifying deviating behaviours. The results of the study show that our method is robust for detecting deviating and sub-optimal behaviours of DH substations. In addition, the proposed method can facilitate domain experts in the interpretation and understanding of the substations' behaviour and performance by providing different data analysis and visualization techniques.
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| 6. |
- Behnam, Moris, et al.
(författare)
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Towards an efficient approach for resource sharing in real-time multiprocessor systems
- 2011
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Ingår i: 2011 6th IEEE International Symposium on Industrial and Embedded Systems. - Västerås : IEEE. - 9781612848181 - 9781612848198 ; , s. 99-102, s. 99-102
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Konferensbidrag (refereegranskat)abstract
- Supporting resource sharing in multiprocessor architectures is one of the major problems that limit the potential performance benefits of using such architectures for real-time systems. Many approaches and algorithms have been proposed to support resource sharing, however, most of them impose either high blocking times on tasks or require a large memory allocation. In this paper we investigate the possibility of combining the lock-based approaches and wait-free approaches (using multiple buffers) in order to decrease both the blocking times that may affect the schedulability of tasks and the required memory. To achieve this, we propose a solution based on evaluating the maximum allowed blocking time on each task according to the schedulability analysis, and then find the minimum memory allocation for each resource that limits the blocking times on tasks to be less than the maximum allowed blocking times.
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| 7. |
- Grahn, Håkan, et al.
(författare)
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A Comparative Evaluation of Hardware-Only and Software-Only Directory Protocols in Shared-Memory Multiprocessors
- 2004
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Ingår i: Journal of Systems Architecture. - : Elsevier BV. - 1383-7621. ; 50:9, s. 537-561
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Tidskriftsartikel (refereegranskat)abstract
- The hardware complexity of hardware-only directory protocols in shared-memory multiprocessors has motivated many researchers to emulate directory management by software handlers executed on the compute processors, called software-only directory protocols.In this paper, we evaluate the performance and design trade-offs between these two approaches in the same architectural simulation framework driven by eight applications from the SPLASH-2 suite. Our evaluation reveals some common case operations that can be supported by simple hardware mechanisms and can make the performance of software-only directory protocols competitive with that of hardware-only protocols. These mechanisms aim at either reducing the software handler latency or hiding it by overlapping it with the message latencies associated with inter-node memory transactions. Further, we evaluate the effects of cache block sizes between 16 and 256 bytes as well as two different page placement policies. Overall, we find that a software-only directory protocol enhanced with these mechanisms can reach between 63% and 97% of the baseline hardware-only protocol performance at a lower design complexity.
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| 8. |
- Grahn, Håkan
(författare)
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Proceedings of the 1st Swedish Workshop on Multi-Core Computing
- 2008
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Rapport (övrigt vetenskapligt/konstnärligt)abstract
- Multicore processors have become the main computing platform for current and future computer systems. This calls for a forum to discuss the challenges and opportunities of both designing and using multicore systems. The objective of this workshop is to bring together researchers and practitioners from academia and industry to present and discuss the recent work in the area of multicore computing. The workshop is the first of its kind in Sweden, and it is co-organized by Blekinge Institute of Technology and the Swedish Multicore Initiative (http://www.sics.se/multicore/). The technical program was put together by a distinguished program committee consisting of people from both from academia and industry in Sweden. We received 16 extended abstracts. Each abstract was sent to four members of the program committee. In total, we collected 64 review reports. The abstracts were judged based on their merits in terms of relevance to the workshop, significance and originality, as well as the scientific and presentation quality. Based on the reviews, the program committee decided to accept 12 papers for inclusion in the workshop, giving an acceptance rate of 75%. The accepted papers cover a broad range of topics, such as programming techniques and languages, compiler and library support, coherence and consistency issues, and verification techniques for multicore systems.
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| 9. |
- Iqbal, Syed Muhammad Zeeshan, et al.
(författare)
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A parallel heuristic for fast train dispatching during railway traffic disturbances : Early results
- 2012
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Konferensbidrag (refereegranskat)abstract
- Railways are an important part of the infrastructure in most countries. As the railway networks become more and more saturated, even small traffic disturbances can propagate and have severe consequences. Therefore, efficient re-scheduling support for the traffic managers is needed. In this paper, the train real-time re-scheduling problem is studied in order to minimize the total delay, subject to a set of safety and operational constraints. We propose a parallel greedy algorithm based on a depth-first branch-and-bound search strategy. A number of comprehensive numerical experiments are conducted to compare the parallel implementation to the sequential implementation of the same algorithm in terms of the quality of the solution and the number of nodes evaluated. The comparison is based on 20 disturbance scenarios from three different types of disturbances. Our results show that the parallel algorithm; (i) efficiently covers a larger portion of the search space by exchanging information about improvements, and (ii) finds better solutions for more complicated disturbances such as infrastructure problems. Our results show that the parallel implementation significantly improves the solution for 5 out of 20 disturbance scenarios, as compared to the sequential algorithm.
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| 10. |
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