Compact low voltage four quadrant CMOS current multiplier

• A new compact low voltage four quadrant current mode CMOS multiplier is presented. Post layout simulation in a CMOS 0.5 mum technology shows a linearity error lower than 0.9% for signal swings up to +/- 50 muA. The Circuit operates at a supply of +/- 1.5V, has a static power dissipation of 0.6 mW and a 1 dB bandwidth of 33 MHz.

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4-quadrant

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