Low-parasitic-capacitance self-aligned 4H-SiC nMOSFETs for harsh environment electronics

• Low-parasitic-capacitance 4H-SiC nMOSFETs using a novel self-aligned process were suggested and demonstrated. In these nMOSFETs, device characteristics including parasitic capacitances (gate-source, gate-drain, drain-source capacitance) were investigated and low parasitic capacitance was achieved by the self-aligned structure

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Annan elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Other Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Nyckelord

Harsh environment electronics

Self-aligned Process

SiC nMOSFET

Capacitance

Electric breakdown

MOSFET devices

Silicon carbide

Device characteristics

Drain sources

Harsh environment

Low-parasitic

NMOSFET

Parasitic capacitance

Self aligned process

Self aligned structure

Fluorine compounds

Publikations- och innehållstyp

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