High-Level Estimation and Trade-Off Analysis for Adaptive Real-Time Systems

• We propose a novel design estimation method for adaptive streaming applications to be implemented on a partially reconfigurable FPGA. Based on experimental results we enable accurate design cost estimates at an early design stage. Given the size and computation time of a set of configurations, which can be derived through logic synthesis, our method gives estimates for configuration parameters, such as bitstream sizes, computation mid reconfiguration times. To fulfil the system's throughput requirements, the required FIFO buffer sizes are then calculated using a hybrid analysis approach based on integer linear programming and simulation. Finally, we are able to calculate the total design cost as the sum of the costs for the FPGA area, the required configuration memory and the FIFO buffers. We demonstrate our method by analysing non-obvious trade-offs for a static and dynamic implementation of adaptivity.

Ämnesord

NATURVETENSKAP  -- Data- och informationsvetenskap -- Datavetenskap (hsv//swe)

NATURAL SCIENCES  -- Computer and Information Sciences -- Computer Sciences (hsv//eng)

Nyckelord

Accurate design

Adaptivity

Bit stream

Computation time

Configuration memory

Configuration parameters

Design costs

Early design stages

Estimation methods

FIFO buffer

High-level estimation

Hybrid analysis

Integer Linear Programming

Logic synthesis

Novel design

Reconfigurable FPGA

Static and dynamic

Streaming applications

Trade-off analysis

Cost accounting

Design

Distributed parameter networks

Field programmable gate arrays (FPGA)

Integer programming

Linearization

Real time systems

Computer science

Datavetenskap

Publikations- och innehållstyp

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