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A highly linear 1.2...
A highly linear 1.2 V 12bit 5-45 MS/s CMOS pipelined ADC with CM-sensing-and-input-interchanged OTA sharing
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- Qin, Yajie (författare)
- KTH,Kommunikationssystem, CoS
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Chen, Qihui (författare)
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Hong, Zhiliang (författare)
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- Signell, Svante R. (författare)
- KTH,Kommunikationssystem, CoS
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(creator_code:org_t)
- 2012-01-22
- 2012
- Engelska.
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Ingår i: Analog Integrated Circuits and Signal Processing. - : Springer Science and Business Media LLC. - 0925-1030 .- 1573-1979. ; 72:1, s. 237-241
- Relaterad länk:
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https://urn.kb.se/re...
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https://doi.org/10.1...
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Abstract
Ämnesord
Stäng
- A 1.2 V 12bit programmable pipelined ADC is presented and implemented in 0.13 mu m CMOS technology. A common-mode-sensing-and-input-interchanged OTA-sharing technique is proposed to address the non-resetting and successive-stage crosstalk issues in conventional OTA-sharing technique. Speed options of 5-45 MS/s are available with scalable power obtained by adjusting the bias currents for OTAs, comparators, and reference buffers, etc., or the global bias current. The measured signal-to-distortion-and-noise ratio is in range of 62.5-69.2 dB, and the peak spurious free dynamic range is 80.7 dB for all speed options, while the figure-of-merit is in the range of 0.26-0.49 pJ/conversion. The core area is 1.5 mm(2).
Ämnesord
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
Nyckelord
- Pipelined ADC
- OTA sharing
- CM-sensing-and-input-interchanged
- Programmable
Publikations- och innehållstyp
- ref (ämneskategori)
- art (ämneskategori)
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