Implementations of the Convolution Operation

• The first part of this article surveys a large number of implementations of the convolution operation (which is also known as the sum-of-products, the inner product) based on a systematic exploration of index permutations. First we assume a limited amount of parallelism in the form of an adder. Next, multipliers and RAM:s are utilized. The so called distributed arithmetic follows naturally from this approach.The second part brings in the concept of pipelining on the bitlevel to obtain high throughput convolvers adapted for VLSI-design (systolic arrays). The serial/parallel multiplier is analyzed in a way that unravels a vast amount new variations. Even more interesting, all these new variations can be carried over to serial/parallel convolvers. These novel devices can be implemented as linear structures of identical cells where the multipliers are embedded at equidistant intervals.

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