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Leakage-tolerant ci...
Leakage-tolerant circuit and method for large register files
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- Alvandpour, Atila, 1960- (författare)
- Linköpings universitet,Tekniska högskolan,Elektroniska komponenter
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- Balamurugan, G. (författare)
- Intel Corp., USA
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- Soumyanath, K. (författare)
- Intel Corp., USA
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visa fler...
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- Krishnamurthy, Ram (författare)
- Intel Corp., USA
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visa färre...
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(creator_code:org_t)
- 2002
- Engelska.
- Relaterad länk:
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https://urn.kb.se/re...
Abstract
Ämnesord
Stäng
- A novel circuit technique for reducing leakage currents through the read-path of large register files in which a negative gate-source voltage is forced on a critical pass transistor between a cell read transistor and a local bitline such that when the cell is in a first state, the leakage current from a dynamic node of the cell read transistor is reduced. The reduced leakage current increases the robustness and performance of the read operation.
Nyckelord
- TECHNOLOGY
- TEKNIKVETENSKAP
Publikations- och innehållstyp
- pop (ämneskategori)
- pat (ämneskategori)