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Vertical High-Voltage Transistors on Thick Silicon-on-Insulator

Heinle, Ulrich, 1967- (författare)
Uppsala universitet,Fasta tillståndets elektronik
Amaratunga, Gehan (opponent)
 (creator_code:org_t)
ISBN 9155455018
Uppsala : Acta Universitatis Upsaliensis, 2003
Engelska 45 s.
Serie: Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, 1104-232X ; 791
  • Doktorsavhandling (övrigt vetenskapligt/konstnärligt)
Abstract Ämnesord
Stäng  
  • More and more electronic products, like battery chargers and power supplies, as well as applications in telecommunications and automotive electronics are based on System-on-Chip solutions, where signal processing and power devices are integrated on the same chip. The integration of different functional units offers many advantages in terms of reliability, reduced power consumption, weight and space reduction, leading to products with better performance at a hopefully lower price. This thesis focuses on the integration of vertical high-voltage double-diffused MOS transistors (DMOSFETs) on Silicon-on-Insulator (SOI) substrates. MOSFETs possess a number of features which makes them indispensable for Power Integrated Circuits (PICs): high switching speed, high efficiency, and simple drive circuits. SOI substrates combined with trench technology is superior to traditional Junction Isolation (JI) techniques in terms of cross-talk and leakage currents. Vertical DMOS transistors on SOI have been manufactured and characterized, and an analytical model for their on-resistance is presented. A description of self-heating and operation at elevated temperatures is included. Furthermore, the switching dynamics of these components is investigated by means of device simulations with the result that the dissipated power during unclamped inductive switching tests is reduced substantially compared to bulk vertical DMOSFETs. A large number of defects is created in the device layer if the trenches are exposed to high temperatures during processing. A new fabrication process with back-end trench formation is introduced in order to minimize defect generation. In addition, a model for the capacitive coupling between trench-isolated structures is developed.

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Annan elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Other Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Nyckelord

Electronics
SOI
vertical DMOS
trench isolation
power electronics
integration
on-resistance
capacitive coupling
self-heating
switching
Elektronik
Electronics
Elektronik
Elektronik
Electronics

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Heinle, Ulrich, ...
Amaratunga, Geha ...
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TEKNIK OCH TEKNOLOGIER
TEKNIK OCH TEKNO ...
och Elektroteknik oc ...
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Comprehensive Su ...
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Uppsala universitet

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