Analysis of time delays in synchronous and asynchronous control loops

• In this paper we describe how to determine the time delays caused by synchronous and asynchronous control loops. These time delays can vary in a quite irregular way and can cause problems for the control loops closed over a communication network of, for instance, field-buses. Different setups allowing an arbitrary number of communication layers are analyzed. The theoretical derivations are illustrated with a simple, although realistic, example.

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Reglerteknik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Control Engineering (hsv//eng)

Publikations- och innehållstyp

kon (ämneskategori)

ref (ämneskategori)