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Reducing ambipolar ...
Reducing ambipolar off-state leakage currents in III-V vertical nanowire tunnel FETs using gate-drain underlap
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- Krishnaraja, Abinaya (författare)
- Lund University,Lunds universitet,Nanoelektronik,Forskargrupper vid Lunds universitet,Nano Electronics,Lund University Research Groups
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- Svensson, Johannes (författare)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Nanoelektronik,Forskargrupper vid Lunds universitet,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH,Nano Electronics,Lund University Research Groups
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- Lind, Erik (författare)
- Lund University,Lunds universitet,NanoLund: Centre for Nanoscience,Annan verksamhet, LTH,Lunds Tekniska Högskola,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Nanoelektronik,Forskargrupper vid Lunds universitet,Other operations, LTH,Faculty of Engineering, LTH,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH,Nano Electronics,Lund University Research Groups
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- Wernersson, Lars-Erik (författare)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Nanoelektronik,Forskargrupper vid Lunds universitet,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH,Nano Electronics,Lund University Research Groups
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(creator_code:org_t)
- AIP Publishing, 2019
- 2019
- Engelska.
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Ingår i: Applied Physics Letters. - : AIP Publishing. - 1077-3118 .- 0003-6951. ; 115:14
- Relaterad länk:
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http://dx.doi.org/10... (free)
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https://aip.scitatio...
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https://doi.org/10.1...
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Abstract
Ämnesord
Stäng
- Tunnel Field-Effect Transistors (TFETs) are an emerging alternative to CMOS for ultralow power and neuromorphic applications. The off current (Ioff) and, hence, the subthreshold swing (S) in these devices are limited by ambipolarity, which degrades its capabilities in complementary circuits. Here, we investigate experimentally vertical InAs/InGaAsSb/GaSb nanowire TFETs with gate-drain underlap as a potential solution to avoid ambipolarity and study the temperature dependence of the tunneling current. We compare two different TFET designs, one with an underlap between the gate and drain and the other with an overlap. The introduction of a 25-nm-long underlap region reduced the minimum achievable current Imin from 92 pA/μm to 23 pA/μm by suppressing the ambipolarity and simultaneously improved the minimum S at room temperature from 46 mV/dec to 41 mV/dec at Vds = 0.1 V. We also observe a reduction in the measured on current (Ion) from 0.1 μA/μm in the overlapped device to 0.01 μA/μm in the underlapped device at a drain bias (Vds) = 0.1 V and Ioff = 1 nA/μm. Temperature dependent measurements reveal a potential barrier at the drain junction due to the ungated region at the underlap. We determine a barrier height of 63 meV at Vds = 0.1 V based on thermionic emission combined with a ballistic transport model. Thus, we conclude that gate placement on the drain side is crucial to obtain the low off-currents in TFETs required for ultralow power electronic applications but that the trade-off between Ion and Ioff has to be considered.
Ämnesord
- TEKNIK OCH TEKNOLOGIER -- Nanoteknik -- Nanoteknik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Nano-technology -- Nano-technology (hsv//eng)
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