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A 3.5GHz 32mW 150nm Multiphase Clock Generator for High-Performance Microprocessors

Alvandpour, A. (author)
Krishnamurthy, R.K. (author)
Eckerbert, Daniel, 1973 (author)
Chalmers tekniska högskola,Chalmers University of Technology
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Apperson, S. (author)
Bloechel, B. (author)
Borkar, S. (author)
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 (creator_code:org_t)
ISBN 0780377079
2003
2003
English.
In: Digest of Technical Papers. IEEE International Solid-State Circuits Conference, 9-13 February 2003. - 0193-6530. - 0780377079
  • Conference paper (peer-reviewed)
Abstract Subject headings
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  • A 3.5GHz 8-phase all-digital clock generator is fabricated in 150nm CMOS to achieve scalable 1.7x frequency-range and 9ps end-to-end time resolution measured at 1.6V and 110°C. A closed-to-open loop control scheme enables 32mW open-loop power consumption, 300μW at clock gate-off, zero-cycle response during clock re-enable, and

Subject headings

NATURVETENSKAP  -- Data- och informationsvetenskap -- Datorteknik (hsv//swe)
NATURAL SCIENCES  -- Computer and Information Sciences -- Computer Engineering (hsv//eng)

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