Test chip and data considerations for MOS parameter extraction

• This paper presents an investigation of principles for test chip design and data point selection for MOS parameter extraction methods using a low number of data points. Variations in extracted parameter values for different combinations and numbers of data points are studied experimentally. The influences on the standard deviations of V/sub T/, /spl beta/, /spl theta/, R/sub S/, /spl Delta/W and /spl Delta/L of different data point selections and device combinations are studied using synthetic data with multiplicative noise.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

Parameter extraction

Data mining

Voltage

Noise measurement

Geometry

MOSFETs

Electronic equipment testing

Semiconductor device measurement

Circuit noise

Chip scale packaging

Publication and Content Type

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