Capturing Process-Voltage-Temperature (PVT) Variations in Architectural Static Power Modeling for SRAM Arrays

• We propose a modeling methodology, including power models, thatcaptures the dependence of leakage power on temperature and supply voltagevariations for accurate architectural-level power estimation of physically partitionedand un-partitioned SRAMarrays. A simulation -based modeling approachis used for temperature-aware leakage power estimation, while a physically-basedanalytical approach is used for modeling the leakage dependence of memory cellson supply voltage. By using the new power models, it is, for example, possibleto preserve our previously reported power estimation accuracy of 96% also in thepresence of temperature and voltage variations.

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Annan elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Other Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Nyckelord

SRAM Power Modeling

VLSI

Deep Submicron

CMOS

Power Estimation

Publikations- och innehållstyp

rap (ämneskategori)

vet (ämneskategori)