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  • Resultat 1-4 av 4
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1.
  • Al-Khatib, Iyad, et al. (författare)
  • A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis : Architectural Design Space Exploration
  • 2006
  • Ingår i: DAC '06. - New York, New York, USA : ACM Press. ; , s. 125-130
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we focus on MPSoC architectures for human heart ECGreal-time monitoring and analysis. This is a very relevant bio-medicalapplication, with a huge potential market, hence it is an ideal targetfor an application-specific SoC implementation. We investigate asymmetric multi-processor architecture based on STMicroelectronicsVLIW DSPs that process in real-time 12-lead ECG signals. Thisarchitecture improves upon state-of-the-art SoC designs for ECGanalysis in its ability to analyze the full 12 leads in real-time, evenwith high sampling frequencies, and ability to detect heartmalfunction. We explore the design space by considering a number ofhardware and software architectural options.
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2.
  • Al Khatib, Iyad, et al. (författare)
  • Hardware/Software architecture for real-time ECG monitoring and analysis leveraging MPSoC technology
  • 2007
  • Ingår i: Transactions on High-Performance Embedded Architectures and Compilers I. - Berlin, Heidelberg : Springer Berlin Heidelberg. - 9783540715276 ; , s. 239-258
  • Konferensbidrag (refereegranskat)abstract
    • The interest in high performance chip architectures for biomedical applications is gaining a lot of research and market interest. Heart diseases remain by far the main cause of death and a challenging problem for biomedical engineers to monitor and analyze. Electrocardiography (ECG) is an essential practice in heart medicine. However, ECG analysis still faces computational challenges, especially when 12 lead signals are to be analyzed in parallel, in real time, and under increasing sampling frequencies. Another challenge is the analysis of huge amounts of data that may grow to days of recordings. Nowadays, doctors use eyeball monitoring of the 12-lead ECG paper readout, which may seriously impair analysis accuracy. Our solution leverages the advance in multi-processor system-on-chip architectures, and it is centered on the parallelization of the ECG computation kernel. Our Hardware- Software (HW/SW) Multi-Processor System-on-Chip (MPSoQ design improves upon state-of-the-art mostly for its capability to perform real-time analysis of input data, leveraging the computation horsepower provided by many concurrent DSPs, more accurate diagnosis of cardiac diseases, and prompter reaction to abnormal heart alterations. The design methodology to go from the 12-lead ECG application specification to the final HW/SW architecture is the focus of this paper. We explore the design space by considering a number of hardware and software architectural variants, and deploy industrial components to build up the system.
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3.
  • Khatib, Iyad Al, et al. (författare)
  • A multiprocessor system-on-chip for real-time biomedical monitoring and analysis : ECG prototype architectural design space exploration
  • 2008
  • Ingår i: ACM Transactions on Design Automation of Electronic Systems. - : Association for Computing Machinery (ACM). - 1084-4309 .- 1557-7309. ; 13:2, s. 31-
  • Tidskriftsartikel (refereegranskat)abstract
    • In this article we focus on multiprocessor system-on-chip (MPSoC) architectures for human heart electrocardiogram (ECG) real time analysis as a hardware/software (HW/SW) platform offering an advance relative to state-of-the-art solutions. This is a relevant biomedical application with good potential market, since heart diseases are responsible for the largest number of yearly deaths. Hence, it is a good target for an application-specific system-on-chip (SoC) and HW/SW codesign. We investigate a symmetric multiprocessor architecture based on STMicroelectronics VLIW DSPs that process in real time 12-lead ECG signals. This architecture improves upon state-of-the-art SoC designs for ECG analysis in its ability to analyze the full 12 leads in real time, even with high sampling frequencies, and its ability to detect heart malfunction for the whole ECG signal interval. We explore the design space by considering a number of hardware and software architectural options. Comparing our design with present-day solutions from an SoC and application point-of-view shows that our platform can be used in real time and without failures.
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4.
  • Khatib, Iyad Al, et al. (författare)
  • MPSoC ECG biochip : A multiprocessor system-on-chip for real-time human heart monitoring and analysis
  • 2006
  • Ingår i: Proceedings of the 3rd Conference on Computing Frontiers 2006, CF '06. - New York, NY, USA : ACM. - 9781595933027 ; , s. 21-28
  • Konferensbidrag (refereegranskat)abstract
    • The interest in high performance chip architectures for biomedical applications is on the rise. Heart diseases remain by far the main cause of death and a challenging problem for biomedical engineers to monitor and analyze. Electrocardiography (ECG) is an essential practice in heart medicine, which faces computational challenges, especially when 12 lead signals are to be analyzed in parallel, in real time, and under increasing sampling frequencies. Another challenge is the analysis of huge amounts of data that may grow to days of recordings. Nowadays, doctors use eyeball monitoring of the 12-lead ECG paper readout, which may seriously impair analysis accuracy. Our solution leverages the advance in multi-processor system-on-chip architectures, and is centered on the parallelization of the ECG computation kernel. It improves upon state-of-the-art mostly for its capability to perform real-time analysis of input data, leveraging the computation horsepower provided by many concurrent DSPs, more accurate diagnosis of cardiac diseases, and prompter reaction to abnormal heart alterations. The design methodology to go from the 12-lead ECG application specification to the final hardware/software architecture, modeling, and simulation is the focus of this paper. Our system model is based on industrial components. The architectural template we employ is scalable and flexible.
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  • Resultat 1-4 av 4
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konferensbidrag (3)
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refereegranskat (4)
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Poletti, Francesco (4)
Bertozzi, Davide (4)
Benini, Luca (4)
Khalifeh, Hasan (4)
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Nabiev, Rustam (4)
Al-Khatib, Iyad (2)
Hajjar, Mazen (2)
Jonsson, Sven (2)
Khatib, Iyad Al (2)
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Engelska (4)
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