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Träfflista för sökning "db:Swepub ;pers:(Jantsch Axel);pers:(Chen Xiaowen);pers:(Xydis Sotirios);pers:(Vanthournout Bart);spr:eng;pers:(Hemani Ahmed);pers:(Ieromnimon Fragkiskos);conttype:(refereed)"

Search: db:Swepub > Jantsch Axel > Chen Xiaowen > Xydis Sotirios > Vanthournout Bart > English > Hemani Ahmed > Ieromnimon Fragkiskos > Peer-reviewed

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1.
  • Candaele, Bernard, et al. (author)
  • Mapping Optimisation for Scalable multi-core ARchiTecture : The MOSART approach
  • 2010
  • In: Proceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010. - 9780769540764 ; , s. 518-523
  • Conference paper (peer-reviewed)abstract
    • The project will address two main challenges of prevailing architectures: 1) The global Interconnect and memory bottleneck due to a single, globally shared memory with high access times and power consumption; 2) The difficulties in programming heterogeneous, multi-core platforms, in particular in dynamically managing data structures in distributed memory. MOSART aims to overcome these through a multi-core architecture with distributed memory organisation, a Network-on-Chip (NoC) communication backbone and configurable processing cores that are scaled, optimised and customised together to achieve diverse energy, performance, cost and size requirements of different classes of applications. MOSART achieves this by: A) Providing platform support for management of abstract data structures Including middleware services and a run-time data manager for NoC based communication infrastructure; 2) Developing tool support for parallelizing and mapping applications on the multi-core target platform and customizing the processing cores for the application.
  •  
2.
  • Candaele, Bernard, et al. (author)
  • The MOSART Mapping Optimization for multi-core Architectures
  • 2011
  • In: VLSI 2010 Annual Symposium. - Dordrecht : Springer Publishing Company. ; , s. 181-195
  • Conference paper (peer-reviewed)abstract
    • MOSART project addresses two main challenges of prevailing architectures: (i) Theglobal interconnect and memory bottleneck due to a single, globally shared memorywith high access times and power consumption; (ii) The difficulties in programmingheterogeneous, multi-core platforms MOSART aims to overcome these through amulti-core architecture with distributed memory organization, a Network-on-Chip(NoC) communication backbone and configurable processing cores that are scaled,optimized and customized together to achieve diverse energy, performance, cost andsize requirements of different classes of applications. MOSART achieves this by:(i) Providing platform support for management of abstract data structures includingmiddleware services and a run-time data manager for NoC based communicationinfrastructure; (ii) Developing tool support for parallelizing and mapping applicationson the multi-core target platform and customizing the processing cores for theapplication.
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  • Result 1-2 of 2
Type of publication
conference paper (2)
Type of content
peer-reviewed  (2)Undo refine
Author/Editor
Hemani, Ahmed (2)Undo refine
Jantsch, Axel (2)Undo refine
Anagnostopoulos, Ira ... (2)
Xydis, Sotirios (2)Undo refine
Bartzas, Alexandros (2)
Lu, Zhonghai (2)
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Soudris, Dimitrios (2)
Chabloz, Jean-Michel (2)
Candaele, Bernard (2)
Aguirre, Sylvain (2)
Sarlotte, Michel (2)
Bekiaris, Dimitris (2)
Vanmeerbeeck, Geert (2)
Kreku, Jari (2)
Tiensyrja, Kari (2)
Kritharidis, Dimitri ... (2)
Wiefrink, Andreas (2)
Martin, Philippe (2)
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University
Royal Institute of Technology (2)
Language
English (2)Undo refine
Research subject (UKÄ/SCB)
Engineering and Technology (2)

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