| 1. |
- Sentilles, Séverine, et al.
(författare)
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Save-IDE – A Tool for Design, Analysis andImplementation of Component-based Embedded Systems
- 2009
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Ingår i: 2009 31ST INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING, PROCEEDINGS. - : IEEE Computer Society. - 9781424434534 ; , s. 607-610
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Konferensbidrag (refereegranskat)abstract
- The paper presents Save-IDE, an Integrated Development Environment for thedevelopment of component-based embedded systems. Save-IDE supports efficient development of dependable embedded systems by providing tools for design of embedded software systems using a dedicated component model, formal specification and analysis of component and system behaviors already in early development phases, and a fully automated transformation of the system of components into an executable image.
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| 2. |
- Åkerholm, Mikael, et al.
(författare)
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Handling Subsystems using the SaveComp Component Technology
- 2006
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Ingår i: Workshop on Models and Analysis for Automotive Systems (WMAAS'06) in conjunction with the 27th IEEE Real-Time Systems Symposium (RTSS'06), Rio de Janeiro, Brazil.
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Konferensbidrag (refereegranskat)
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| 3. |
- Åkerholm, Mikael, et al.
(författare)
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Handling Subsystems using the SaveComp Component Technology
- 2006
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Ingår i: Proceedings of Workshop on Models and Analysis for Automotive Systems (WMAAS'06).
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Konferensbidrag (refereegranskat)abstract
- This article presents a component technology (SaveCCT) suitable for the development of embedded vehicular control-system software. To satisfy the requirements in the vehicular domain, SaveCCT is designed to allow analysis and verification during the entire software development process.We give an overview of SaveCCT and its associated component model SaveCCM, together with an outline of how the framework intends to support the integration of larger -- possibly independently developed -- subsystems into a complete vehicle control system.
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| 4. |
- Åsberg, Mikael, et al.
(författare)
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Modelling, Verification and Synthesis of Two-Tier Hierarchical Fixed-Priority Preemptive Scheduling
- 2011
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Ingår i: Proceedings - 23rd EUROMICRO Conference on Real-Time Systems (ECRTS'11). - 9780769544427 ; , s. 172-181
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Konferensbidrag (refereegranskat)abstract
- Hierarchical scheduling has major benefits when it comes to integrating hard real-time applications. One of those benefits is that it gives a clear runtime separation of applications in the time domain. This in turn gives a protection against timing error propagation in between applications. However, these benefits rely on the assumption that the scheduler itself schedules applications correctly according to the scheduling parameters and the chosen scheduling policy. A faulty scheduler can affect all applications in a negative way. Hence, being able to guarantee that the scheduler is correct is of great importance. Therefore, in this paper, we study how properties of hierarchical scheduling can be verified. We model a hierarchically scheduled system using task automata, and we conduct verification with model checking using the Times tool. Further, we generate C-code from the model and we execute the hierarchical scheduler in the Vx Works kernel. The CPU and memory overhead of the modelled scheduler is compared against an equivalent manually coded two-level hierarchical scheduler. We show that the worst-case memory consumption is similar and that there is a considerable difference in CPU overhead.
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| 5. |
- Åsberg, Mikael, et al.
(författare)
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Prototyping Hierarchically Scheduled Systems using Task Automata and TIMES
- 2010
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Ingår i: Proceedings of the 5th International Conference on Embedded and Multimedia Computing (EMC-10). - 9781424477104 ; , s. article nr: 5575626-
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Konferensbidrag (refereegranskat)abstract
- In hierarchical scheduling, a system is organized into multiple levels of individually scheduled subsystems (hierarchical scheduling tree), which provides several benefits for developers including possibilities for parallel development of subsystems. In this paper, we study how the model of task automata and the Times tool can be applied to provide support for rapid and early prototyping of hierarchically scheduled embedded systems. As a main result, we show how a single node, in an arbitrary level in a hierarchical scheduling tree (scheduled with fixed-priority preemptive scheduling), can easily be analyzed in Times by replacing all interfering nodes with a small set of higher priority (dummy) tasks. We show with an algorithm how these dummy tasks are generated (including task-parameters such as period, offset etc.). Further, we generate executable source code, with the Times code-generator, that emulates the scheduling environment (with our dummy tasks), i.e., the hierarchical scheduling tree and all of its preemptions, of a small example system. Yet another contribution is that we transform the generated (brickOS) source code to run on an industrial oriented platform (VxWorks), and conduct an performance evaluation.
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