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- Berg, Martin, et al.
(författare)
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Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si
- 2016
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Ingår i: Technical Digest - International Electron Devices Meeting, IEDM. - 9781467398930 ; 2016-February
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Konferensbidrag (refereegranskat)abstract
- In this work, we present a novel self-aligned gate-last fabrication process for vertical nanowire metal-oxide-semiconductor field-effect transistors. The fabrication method allows for exposure dose-defined gate lengths and a local diameter reduction of the intrinsic channel segment, while maintaining thicker highly doped access regions. Using this process, InAs nanowire transistors combining good on-and off-performance are fabricated demonstrating Q = gm,max/SS = 8.2, which is higher than any previously reported vertical nanowire MOSFET.
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