| 1. |
- Kaiser, M., et al.
(författare)
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VEDLIoT: Very Efficient Deep Learning in IoT
- 2022
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Ingår i: Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022. - : IEEE. - 9783981926361
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Konferensbidrag (refereegranskat)abstract
- The VEDLIoT project targets the development of energy-efficient Deep Learning for distributed AIoT applications. A holistic approach is used to optimize algorithms while also dealing with safety and security challenges. The approach is based on a modular and scalable cognitive IoT hardware platform. Using modular microserver technology enables the user to configure the hardware to satisfy a wide range of applications. VEDLIoT offers a complete design flow for Next-Generation IoT devices required for collaboratively solving complex Deep Learning applications across distributed systems. The methods are tested on various use-cases ranging from Smart Home to Automotive and Industrial IoT appliances. VEDLIoT is an H2020 EU project which started in November 2020. It is currently in an intermediate stage with the first results available.
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| 2. |
- Kaufmann, Daniela, et al.
(författare)
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Adding Dual Variables to Algebraic Reasoning for Gate-Level Multiplier Verification
- 2022
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Ingår i: Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022. - 9783981926361 ; , s. 1431-1436
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Konferensbidrag (refereegranskat)abstract
- Algebraic reasoning has proven to be one of the most effective approaches for verifying gate-level integer mul-tipliers, but it struggles with certain components, necessitating the complementary use of SAT solvers. For this reason validation certificates require proofs in two different formats. Approaches to unify the certificates are not scalable, meaning that the validation results can only be trusted up to the correctness of compositional reasoning. We show in this paper that using dual variables in the algebraic encoding, together with a novel tail substitution and carry rewriting method, removes the need for SAT solvers in the verification flow and yields a single, uniform proof certificate.
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| 3. |
- Mohaqeqi, Morteza, et al.
(författare)
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Counting Priority Inversions : Computing Maximum Additional Core Requests of DAG Tasks
- 2022
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Ingår i: Proceedings Of The 2022 Design, Automation & Test In Europe Conference & Exhibition (DATE 2022). - : Institute of Electrical and Electronics Engineers (IEEE). - 9783981926361 ; , s. 1281-1286
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Konferensbidrag (refereegranskat)abstract
- Many parallel real-time applications can be modeled as DAG tasks. Guaranteeing timing constraints of such applications executed on multicore systems is challenging, especially for the applications with non-preemptive execution blocks. The existing approach for timing analysis of such tasks with sporadic release relies on computing a bound on the interfering workload on a task, which depends on the number of priority inversions the task may experience. The number of priority inversions, in turn, is a function of the total number of additional cores a task instance may request after each node spawning. In this paper, we show that the previously proposed polynomial-time algorithm to compute the maximum number of additional core requests of a DAG is not correct, providing a counter example. We show that the problem is in fact NP-hard. We then present an ILP formulation as an exact solution to the problem. Our evaluations show that the problem can be solved in a few minutes even for DAGs with hundreds of nodes.
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