| 1. |
- Acharya, Sarthak, et al.
(författare)
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An Additive Production approach for Microvias and Multilayered polymer substrate patterning of 2.5μm feature sizes
- 2020
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Ingår i: IEEE 70th Electronic Components and Technology Conference. - : IEEE. ; , s. 1304-1308
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- Consumer electronics market is escalating towards the miniaturization and the use of HDI-PCBs is dominating. Thus, the production technologies are adapting the Semi-Additive process (SAP) or modified-SAP (mSAP) methods over conventional subtractive print-and-etch methods. Most of the Smartphone manufacturers are using Substrate-like PCB (SLP) with mSAP techniques to scale down the Lines and Spaces (L&S) on PCBs equivalent to ICs. However, those processes still involve subtractive patterning in the intermediate stages of fabrication. In this paper, a fully additive multi-layer patterning process using an electroless copper plating has been investigated. This patterning process is based on modifying a polymer surface by activating a seed layer of grafting polymer chains on it using optimized UV-Laser parameters. This surface modification enables a strong bonding of Copper (Cu) onto the modified surface by Cu-plating. Using a micrometer via laser ablation and subsequent sub-micrometer laser lithography a 2.5D surface pattern has been achieved with the proposed technique.So far, using the proposed additive production process the feature sizes of 2.5 μm L&S and via of diameter 10 μm have been achieved.The via ablation and pattering were done by using 266nm and 375nm laser sources respectively.The substrates used are standard FR4 material and a layer of polyurethane of thickness 35μm coated on top of it. Analysis of the process parameters and their optimization has been done by factorial design method using Design Expert 12.0 software to show their contribution and significance in the production process.
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| 2. |
- Acharya, Sarthak
(författare)
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An SBU fully additive production approach for Board-level Electronics Packaging (SBU-CBM Method)
- 2021
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The worldwide electronics market is focusing on developing innovative technologies that can lead to denser, more resilient, and tighter board-level integration. The consumer electronics market is trending toward miniaturization, with HDI-PCBs dominating. Electronics shrinking and scaling technology is the prime concern of all manufacturers. The PCBA industry is transforming its production practices which can reduce the solder joints, limit the usage of discrete and bulky components, reduce the packaging factor of printed boards by accommodating the maximum number of ICs, minimize the assembly span, optimize the latency, and so on. However, developments in production processes in the PCB manufacturing industry need more attention than those in Silicon-based (ICs) fabrications. One of the issues in PCB fabrication is utilizing conventional metallization approaches. The majority of manufacturers continue to use standard Copper(Cu) laminates on the base substrate and lithography methods to shape the structures.In recent manufacturing technologies, semi-Additive process (SAP) or modified-SAP (mSAP) methods are being adopted to replace traditional subtractive print-and-etch procedures. To scale down the Lines and Spaces (L\&S) on PCBs comparable to that of IC-level, most smartphone makers use Substrate-like PCB (SLP) using mSAP methods. However, subtractive patterning has been used in the intermediate stages of fabrication in those methods. This thesis demonstrates a fully additive selective metallization-based production approach to bridge this technology gap between IC-level and board-level fabrications. The fabrication process has given the name 'Sequential Build-Up Covalent Bonded Metallisation' (SBU-CBM) method.This dissertation presents a new approach to Cu metallization using a significant step reducing-pattern-transfer process. The patterning method activates a seed layer of CBM polymer chains on a polymer surface with optimal UV-Laser settings. This surface modification enables a strong Copper (Cu) bonding onto the modified surface by Cu-plating. The suggested approach generated a 2.5D surface pattern using a micrometer via laser ablation and subsequent sub-micrometer laser lithography. Furthermore, the surface characterization of each step involved in the fabrication process is analysed and presented to show the sequential growth of layers on top of each other. To investigate the mechanism of the process at the interfaces, characterizations such as EDS, SEM, and XRD characterizations were performed. This PCB manufacturing method can selectively add metallic layers to the finest feature sizes at considerably lower temperatures. Overall, the thesis has addressed two critical aspects i.e. miniaturization of interconnects at board-level and the feasibility of a fully-additive production approach for electronics packaging.First, a subtractive method is shown to achieve Copper interconnects with feature size 3.0$\mu$m. This miniaturization corresponds to 70\% reduction in the feature size from 20 $\mu$m to 3 $\mu$m. Next, the proposed additive production process has produced Cu interconnects with feature sizes of 2.5 $\mu$m L\&S and via of diameter 10 $\mu$m. The scaling of the interconnects was achieved by optimizing the process parameters involved in the proposed fabrication recipe.Second, the sequential build-up (SBU) procedure is adopted to realize the embedded passives with the minimum possible feature size ($<$ 10 $\mu$m). An embedded capacitor and a planar inductor were fabricated. The proposed method can be employed to achieve any desirable pattern on FR-4, and a few of them are shown in the thesis. This additive technique can further be investigated through electrical and reliability assessment to make it an industrially accepted method.
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| 3. |
- Acharya, Sarthak, et al.
(författare)
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Detailed Characterization of a Fully Additive Covalent Bonded PCB Manufacturing Process (SBU-CBM Method)
- 2022
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Ingår i: Processes. - : MDPI. - 2227-9717. ; 10:4
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Tidskriftsartikel (refereegranskat)abstract
- To bridge the technology gap between IC-level and board-level fabrications, a fully additive selective metallization has already been demonstrated in the literature. In this article, the surface characterization of each step involved in the fabrication process is outlined with bulk metallization of the surface. This production technique has used polyurethane as epoxy resin and proprietary grafting chemistry to functionalize the surface with covalent bonds on an FR-4 base substrate. The surface was then metalized using an electroless copper (Cu) bath. This sequential growth of layers on top of each other using an actinic laser beam and palladium (Pd) ions to deposit Cu is analyzed. State-of-the-art material characterization techniques were employed to investigate process mechanism at the interfaces. Density functional theory calculations were performed to validate the experimental evidence of covalent bonding of the layers. This manufacturing approach is capable of adding metallic layers in a selective manner to the printed circuit boards at considerably lower temperatures. A complete analysis of the process using bulk deposition of the materials is illustrated in this work.
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| 4. |
- Acharya, Sarthak, et al.
(författare)
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Fabrication Process for On-Board Geometries Using a Polymer Composite-Based Selective Metallization for Next-Generation Electronics Packaging
- 2021
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Ingår i: Processes. - : MDPI. - 2227-9717. ; 9:9
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Tidskriftsartikel (refereegranskat)abstract
- Advancements in production techniques in PCB manufacturing industries are still required as compared to silicon-ICs fabrications. One of the concerned areas in PCBs fabrication is the use of conventional methodologies for metallization. Most of the manufacturers are still using the traditional Copper (Cu) laminates on the base substrate and patterning the structures using lithography processes. As a result, significant amounts of metallic parts are etched away during any mass production process, causing unnecessary disposables leading to pollution. In this work, a new approach for Cu metallization is demonstrated with considerable step-reducing pattern-transfer mechanism. In the fabrication steps, a seed layer of covalent bonded metallization (CBM) chemistry on top of a dielectric epoxy resin is polymerized using actinic radiation intensity of a 375 nm UV laser source. The proposed method is capable of patterning any desirable geometries using the above-mentioned surface modification followed by metallization. To metallize the patterns, a proprietary electroless bath has been used. The metallic layer grows only on the selective polymer-activated locations and thus is called selective metallization. The highlight of this production technique is its occurrence at a low temperature (20–45 °C). In this paper, FR-4 as a base substrate and polyurethane (PU) as epoxy resin were used to achieve various geometries, useful in electronics packaging. In addition, analysis of the process parameters and some challenges witnessed during the process development are also outlined. As a use case, a planar inductor is fabricated to demonstrate the application of the proposed technique.
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| 5. |
- Acharya, Sarthak, et al.
(författare)
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Realization of Embedded Passives using an additive Covalent bonded metallization approach
- 2019
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Ingår i: 2019 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC). - : IEEE.
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- Miniaturization is the call of the day. Electronics shrinking and scaling technology is the priority of all manufacturers. PCBA Industry is working towards the elimination of solder joints, reduction in use of discrete and bulky components, lowering of assemble span, minimized latency etc. Embedded passive technology is playing a significant role in this roadmap by providing better signal performance, reduced parasitic and crosstalk. In this work, the primary focus is to develop a cost-efficient and flexible fabrication methodology that will be suitable for bulk production. A sequential build up (SBU) procedure is adopted with an additive lithography process to realize the passives with minimum possible feature size (<; 10 μm). A low cost insulating material, promising grafting solution and Laser assisted writing machine with optimized fabrication parameters are the highlights of this production method. A Computer Aided Design (CAD) software i.e. clewin is used during this process to pattern the mask for the entire process. Covalent bonded metallization (CBM) is the key process for the adhesion of copper layer on the desired site of the pattern. In the CBM process, a polymer surface is modified by grafting. The position of the surface modification is optically defined using a laser lithography system. Such surface modified samples are, then treated in an electroless copper process. Resulting in copper metallization only at the locations with a CBM modified surface. The verification of the copper deposition on the substrate is investigated using a high-resolution microscope followed by scanning electron microscopy (SEM). The confirmation of passive formation has been checked using kethley's source (electrical two-probe measurement). The first-order measured results showed the capacitance formed in the range of 0.3-8 pF. Further concrete measurements using standard methods are undergoing. One of the key advantage of this proposed process is its easiness and feasibility of at room temperature.
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| 6. |
- Acharya, Sarthak, et al.
(författare)
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Scalability of Copper-Interconnects down to 3μm on Printed Boards by Laser-assisted-subtractive process
- 2019
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Ingår i: Proceedings of: 2019 IMAPS Nordic Conference on Microelectronics Packaging (NordPac). - : IEEE. ; , s. 17-20
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Konferensbidrag (refereegranskat)abstract
- As per the latest roadmap of iNEMI, the global electronics market is emphasizing to identify disruptive technologies that can contribute towards denser, robust and tighter integration on the board level. Therefore, reduction in packaging factor of printed board can accommodate greater number of ICs to support miniaturization. This paper has shown an experimental method to pattern the metallic layer on a Printed circuit Board (PCB) to the smallest feature size. To investigate this, a commercially available FR-4 PCB with photosensitive material coat and a Copper (Cu) layer on it, is used. A reverse-mode Laser assisted writing is implemented to pattern the desired copper tracks. Soon after, a well-controlled development and chemical etching of the Laser-activated regions are done using Sodium Hydroxide solution followed by an aqueous solution of Sodium Persulfate. Current PCB interconnects used by the industries are of the order (~20 μm). Whereas the present work is a contribution towards achieving Copper interconnects with feature size 3.0μm. This miniaturization corresponds to 70% reduction in the feature size from 20 μm to 3μm. The natural adhesion of the Cu layer has remained intact even after the etching, shows the efficiency of the method adopted. Also, variation in the parameters such as etching time, etchant solution concentrations, temaperature, gain and exposure time of Laser beam and their corresponding effects are discussed. Other highlights of this subtractive method includes its cost-efficiency, lesser production time and repeatability.
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| 7. |
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| 8. |
- Bhoi, Bandan Kumar, et al.
(författare)
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Analyzing Design Parameters of Nano-Magnetic Technology Based Converter Circuit
- 2019
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Ingår i: VLSI Design and Test. - Singapore : Springer. - 9789813297661 ; , s. 34-46
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Konferensbidrag (refereegranskat)abstract
- Digital circuits need improvement in computation speed, reducing circuit complexity and power consumption. Emerging Technology NML can be such an architecture at nano-scale and thus emerges as a viable alternative for the digital CMOS VLSI. This technology has the capability to compute the logic as well as storage into the same device, which points out that it great potential for emerging technology. Since Nano-magnetic, technology fast approaches its minimal feature size, high device density and operate at room temperature. NML based circuits synthesis has to opt for novel half subtraction and Binary-to-Gray architecture for achieving minimal complexity and high-speed performance. This manuscript pro-poses area efficient binary half-subtraction and Binary-to-Gray converter architecture. Circuits’ synthesize are performed by MagCAD tool and simulate by Modelsim simulator. The circuit’s performance are estimated over other existing designs. The proposed converter consume 73.73%, and 94.49% less area than the converter designed using QCA and CMOS technique respectively. This is a significant contribution to this paper. Simulation results of converter show that the critical path delay falls within 0.15 µs.
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| 9. |
- Imani, Roghayeh, et al.
(författare)
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A Fully Additive Approach for the Fabrication of Split-Ring Resonator Metasurfaces
- 2022
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Ingår i: Proceedings: IEEE 72nd Electronic Components and Technology Conference (ECTC 2022). - : IEEE. - 9781665479431 ; , s. 1834-1840
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- Metasurfaces, as a two-dimensional (2D) form of metamaterial, offer the possibility of designing miniaturized antennas for radio frequency (RF) energy harvesting systems with high efficiency, but fabrication of these antennas is still a major challenge. Printed circuit board (PCB) lithography, utilizing subtractive etch-and-print techniques to create metal interconnects on PCBs, was the first technique used to create metasurfaces antennas and remains the dominant technique to this day. The development of large-area fabrication techniques that are flexible, precise, uniform, cost-effective, and environmentally friendly is urgently needed for creating next-generation metasurfaces antenna. The present study reports a new fully additive manufacturing method for the fabrication of copper split-ring resonator (SRR) arrays on a PCB as a planar compact metasurfaces antenna. This new method was developed by combining sequential build up (SBU), laser direct writing (LDW), and covalent bonded metallization (CBM) methods and called (SBU-CBM). In this method, standard FR-4 covered with a layer of polyurethane was used as a basic PCB. The polymer surface was coated with a grafting molecule, followed by LDW to pattern the SRR array on the PCB. Finally, in electroless plating, only the laser-scanned area was selectively plated, and copper covalent bond metallization was selectively plated on the SRR pattern. Copper SRR arrays with different sizes were successfully fabricated on PCB using the SBU-CBM method. Copper strip lines within the SRR repeating building block were miniaturized up to 5 μm. To the best of our knowledge, this is the smallest size of a PCB antenna that has been reported to date.
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| 10. |
- Imani, Roghayeh, et al.
(författare)
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A Fully Additive Fabrication Approach for sub-10-Micrometer Microvia Suitable for 3-D System-in-Package Integration
- 2023
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Ingår i: Proceedings - IEEE 73rd Electronic Components and Technology Conference, ECTC 2023. - : Institute of Electrical and Electronics Engineers Inc.. - 9798350334999 - 9798350334982 ; , s. 1926-1931
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Konferensbidrag (refereegranskat)abstract
- The semiconductor industry demands high input/output (I/O) density, requiring sub-l0-micrometer microvia. Here we propose a novel, fully additive, economical approach for creating and copper plating of microvias. The experimental process consisted of three stages. In Stage I, a polyurethane layer was spin-coated onto a FR-4 PCB base, followed by target copper layer deposition using the sequential build-up-covalent bonded metallization (SBU -CBM) method. In Stage II, first another layer of polyurethane was spin-coated on the top of the target copper layer, and then a microvia was created on the polyurethane layer using a picosecond pulsed ultraviolet (UV) laser. Finally, in Stage III, the SBU-CBM method was used to selectively copper plating of the microvia. Optical microscopy and cross-section scanning electron microscopy (SEM) images confirmed the successful formation and copper plating of sub-l0 micrometer microvia.
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