| 1. |
- Arlat, Jean, et al.
(författare)
-
MEFISTO: A Series of Prototype Tools for Fault Injection into VHDL Models
- 2003
-
Ingår i: Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation, Kluwer Academic Publishing. - 1402075898 ; , s. 177-193
-
Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
- The early assessment of the fault tolerance mechanisms is an essential task in the design of dependable computing systems. Simulation languages offer the necessary support to carry out such a task. Due to its wide spectrum of application and hierarchical features, VHDL is a powerful simulation language. This chapter summarizes the main results of a pioneering effort aimed at developing and experimenting supporting tools for fault injection into VHDL models. The chapter first identifies the possible means to inject faults into a VHDL model. Then, we describe two prototype tools that were developed using each of the main injection strategies previously identified. Finally, some general insights and perspectives are briefly discussed.
|
|
| 2. |
|
|
| 3. |
- Aidemark, Joakim, 1965, et al.
(författare)
-
Experimental Dependability Evaluation of the Artk68-FT Real-time Kernel
- 2004
-
Ingår i: Proc. of the International Conference on Real-Time and Embedded Computer Systems and Applications. ; , s. 625-645
-
Konferensbidrag (refereegranskat)abstract
- This paper presents an experimental dependability evaluation of a small real-time kernel called Artk68-FT intended for distributed fault-tolerant real-time systems. A main goal of this research is to improve the dependabilityof such systems by using a two-level approach for tolerating transient faults. By providing mechanisms in the kernel for tolerating transient faults at the node level, the overall reliability is improved since the recovery time is much shorter at the node level than at the system level. Permanent faults and transient faults that cannot be handled at the node level have to be handled at the system level. The experimental evaluation was performed using fault injection experiments on the MC68340 microcontroller executing the kernel and three application tasks. The experimental results show that no wrong results were produced when faults were injected during execution of a critical task protected by Artk68-FT. Moreover, no application crashes were observed in the fault injection experiments with Artk68-FT compared to experiments with a version of the kernel without fault handling mechanisms.
|
|
| 4. |
- Aidemark, Joakim, 1965, et al.
(författare)
-
Experimental evaluation of time-redundant execution for a brake-by-wire application
- 2002
-
Ingår i: International Conference on Dependable Systems and Networks, 2002. DSN 2002. Proceedings. - 0769511015 ; , s. 210-215
-
Konferensbidrag (refereegranskat)abstract
- This paper presents an experimental evaluation of a brake-by-wire application that tolerates transient faults by temporal error masking. A specially designed real-time kernel that masks errors by triple time-redundant execution and voting executes the application on a fail-stop computer node. The objective is to reduce the number of node failures by masking errors at the computer node level. The real-time kernel always executes the application twice to detect errors, and ensures that a fail-stop failure occurs if there is not enough CPU-time available for a third execution and voting. Fault injection experiments show that temporal error masking reduced the number of fail-stop failures by 42% compared to executing the brake-by-wire task without time redundancy.
|
|
| 5. |
- Aidemark, Joakim, 1965
(författare)
-
Node-Level Fault Tolerance for Embedded Real-Time Systems
- 2004
-
Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis deals with cost-effective design and validation of fault tolerant distributed real-time systems. Such systems play an increasingly important role in embedded applications such as automotive and aerospace systems. The cost of fault-tolerance is of primary concern in these systems, particularly for emerging applications like micro-satellites, unmanned air vehicles and active safety systems for road vehicles. We address cost issues of fault tolerance from both a design and a validation perspective. From a design perspective, we investigate cost-effective techniques that can make systems more resilient to transient hardware faults. We propose a two-level approach to achieve fault-tolerance that combines system-level and node-level fault tolerance. Our approach relies on nodes that mask the effects of most transient faults and exhibit omission or fail-silent failures for permanent faults and transient faults that cannot be masked by the node itself. As only a subset of the faults is tolerated at the node level, we call this approach /light-weight node-level fault tolerance/, or light-weight NLFT. Tolerating transient faults at the node level is important in systems that rely on duplicated nodes for fault tolerance, as it allows the system to survive transient faults also when one of the nodes have failed permanently. It also improves the robustness of the system when both nodes are affected by correlated or near coincident transient faults. We have implemented a real-time kernel that supports light-weight NLFT through time redundant execution of tasks and the use of software implemented error detection. The effectiveness of light-weight NLFT is evaluated both analytically and by extensive fault injection experiments. The thesis also deals with the cost of fault tolerance from a validation perspective. Fault injection based validation of error handling mechanisms is a time consuming and costly activity. We present a fault injection tool that can be easily extended and adapted to different target systems making fault injection less time-consuming. We also propose an analytical technique for investigating how error coverage varies for different input sequences to a system. The analysis helps us identify interesting activation patterns, e.g., those that give extremely low, or high, error coverage.
|
|
| 6. |
|
|
| 7. |
- Aidemark, Joakim, 1965, et al.
(författare)
-
On the probability of detecting data errors generated by permanent faults using time redundancy
- 2003
-
Ingår i: Proceedings of the 9th IEEE International On-Line Testing Symposium, Kos, 7-9 July 2003. - 0769519687 ; , s. 68-74
-
Konferensbidrag (refereegranskat)abstract
- Time redundant execution of tasks and comparison of results is a well-known technique for detecting transient faults in computer systems. However, time redundancy is also capable of detecting permanent faults that occur during or between the executions of two task replicas, provided the faults affect the results of the two tasks in different ways. In this paper, we derive an expression for estimating the probability of detecting data errors generated by permanent faults with time redundant execution. The expression is validated experimentally by injecting permanent stuck-at faults into a multiplier unit of a microprocessor. We use the derived expression to show how tasks can be scheduled to improve the detection probability of errors generated by permanent faults. We also show that the detection capability of permanent faults is low for the Temporal Error Masking (TEM) technique (i.e. triplicated execution and voting to mask transient faults) and may not be increased by scheduling. Thus, we propose complementing TEM with special test tasks.
|
|
| 8. |
- Aidemark, Joakim, 1965, et al.
(författare)
-
Path-Based Error Coverage Prediction
- 2002
-
Ingår i: Journal of Electronic Testing: Theory and Applications (JETTA). - 1573-0727 .- 0923-8174. ; 18:3, s. 343-349
-
Tidskriftsartikel (refereegranskat)abstract
- We present an analytical technique that uses fault injection data for estimating the coverage of concurrent error detection mechanisms in microprocessors. A major problem in such estimations is that the coverage depends on the program executed by the microprocessor as well as the input sequence to the program. We propose a method that predicts the error coverage for a specified input sequence based on fault injection data obtained for another input sequence. Our results show that post-injection analysis is a promising approach for reducing the cost of coverage estimation.
|
|
| 9. |
|
|
| 10. |
|
|
