| 1. |
- Arshad, Sana, et al.
(författare)
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50-830 MHz noise and distortion canceling CMOS low noise amplifier
- 2018
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Ingår i: Integration. - : Elsevier. - 0167-9260 .- 1872-7522. ; 60, s. 63-73
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Tidskriftsartikel (refereegranskat)abstract
- In this paper, a modified resistive shunt feedback topology is proposed that performs noise cancelation and serves as an opposite polarity non-linearity generator to cancel the distortion produced by the main stage. The proposed topology has a bandwidth similar to a resistive shunt feedback LNA, but with a superior noise figure (NF) and linearity. The proposed wideband LNA is fabricated in 130 nm CMOS technology and occupies an area of 0.5 mm(2). Measured results depict 3-dB bandwidth from 50 to 830 MHz. The measured gain and NF at 420 MHz are 17 dB and 2.2 dB, respectively. The high value of the 1/f noise is one of the key problems in low frequency CMOS designs. The proposed topology also addresses this challenge and a low NF is attained at low frequencies. Measured 811 and S22 are better than -8.9 dB and -8.5 dB, respectively within the 0.05-1 GHz band. The 1-dB compression point is -11.5 dBm at 700 MHz, while the IIP3 is -6.3 dBm. The forward core consumes 14 mW from a 1.8 V supply. This LNA is suitable for VHF and UHF SDR communication receivers.
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| 2. |
- Arshad, Sana, et al.
(författare)
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Highly Linear Inductively Degenerated 0.13 mu m CMOS LNA using FDC Technique
- 2014
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Ingår i: 2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS). - : IEEE. - 9781479952304 ; , s. 225-228
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Konferensbidrag (refereegranskat)abstract
- In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M-6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M-2 and M-3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13 mu m CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13 mu m CMOS in 2.4GHz frequency band.
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