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- Deb, Abhijit Kumar, et al.
(författare)
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Hardware software codesign of DSP system using grammar based approach
- 2001
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Ingår i: VLSI Design, 2001. Fourteenth International Conference on. ; , s. 42-47
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Konferensbidrag (refereegranskat)abstract
- Embedded cores are gaining widespread use to deal with the complex DSP systems where flexibility is of utmost importance. The design of such a system offers several problems, which are not addressed by the existing methodology. The authors previously presented an integrated grammar based DSP design methodology that separates architectural and functional specification, can create a virtual prototype and has a smooth link to the implementation phase. In this paper we present the extension of the work to handle embedded cores. Here we the capture the host peripheral interface (HPI) of TMS320C6x core at higher level of abstraction and provide a single simulation environment, which facilitates faster analysis of hardware software components. Our results reveal that the proposed methodology offers simulation time speed-up of 5 times and design time speed-up of 8 times, while keeping the architectural specification separated from functionality
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- Deb, Abhijit Kumar, et al.
(författare)
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System design for DSP applications in transaction level modeling paradigm
- 2004
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Ingår i: 41st Design Automation Conference, Proceedings 2004. - New York, NY, USA : ACM. - 1581138288 ; , s. 466-471
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Konferensbidrag (refereegranskat)abstract
- In this paper, we systematically define three transaction level models (TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP system. We also show a unique language support to build the TLMs. Our results show that the abstract TLMs can be built and simulated much faster than the implementation model at the expense of a reasonable amount of simulation accuracy.
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- Deb, Abhijit Kumar, et al.
(författare)
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System design for DSP applications using the MASIC methodology
- 2004
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Ingår i: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS. - LOS ALAMITOS : IEEE COMPUTER SOC. - 0769520855 ; , s. 630-635
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Konferensbidrag (refereegranskat)abstract
- Expensive top-down iterations are often required in the design cycle of complex DSP systems. In this paper, we introduce two levels of abstraction in the design flow by, systematically categorizing the architectural decisions. As a result, the top-down iteration loop is broken. We also present a technique to capture and inject the architectural decisions such that the system models can be created and simulated efficiently. The concepts are illustrated by a realistic speech processing example, which is implemented using the AMBA on-chip architecture. Our methodology offers a smooth path from the functional modeling phase to the implementation level, facilitates the reuse of HW and SW components, and enjoys existing tool support at the backend.
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| 7. |
- Deb, Abhijit Kumar, 1970-
(författare)
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System Design for DSP Applications with the MASIC Methodology
- 2004
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The difficulties of system design are persistentlyincreasing due to the integration of more functionality on asystem, time-to-market pressure, productivity gap, andperformance requirements. To address the system designproblems, design methodologies build system models at higherabstraction level. However, the design task to map an abstractfunctional model on a system architecture is nontrivial becausethe architecture contains a wide variety of system componentsand interconnection topology, and a given functionality can berealized in various ways depending on cost-performancetradeoffs. Therefore, a system design methodology must provideadequate design steps to map the abstract functionality on adetailed architecture. MASIC—Maths to ASIC—is a system design methodologytargeting DSP applications. In MASIC, we begin with afunctional model of the system. Next, the architecturaldecisions are captured to map the functionality on the systemarchitecture. We present a systematic approach to classify thearchitectural decisions in two categories: system leveldecisions (SLDs) and implementation level decisions (ILDs). Asa result of this categorization, we only need to consider asubset of the decisions at once. To capture these decisions inan abstract way, we present three transaction level models(TLMs) in the context of DSP systems. These TLMs capture thedesign decisions using abstract transactions where timing ismodeled only to describe the major synchronization events. As aresult the functionality can be mapped to the systemarchitecture without meticulous details. Also, the artifacts ofthe design decisions in terms of delay can be simulatedquickly. Thus the MASIC approach saves both modeling andsimulation time. It also facilitates the reuse of predesignedhardware and software components. To capture and inject the architectural decisionsefficiently, we present the grammar based language of MASIC.This language effectively helps us to implement the stepspertaining to the methodology. A Petri net based simulationtechnique is developed, which avoids the need to compile theMASIC description to VHDL for the sake of simulation. We alsopresent a divide and conquer based approach to verify the MASICmodel of a system. Keywords:System design methodology, Signal processingsystems, Design decision, Communication, Computation, Modeldevelopment, Transaction level model, System design language,Grammar, MASIC.
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- Hemani, Ahmed, et al.
(författare)
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System level virtual prototyping of DSP ASICs using grammar based approach
- 1999
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Ingår i: Rapid System Prototyping, 1999. IEEE International Workshop on. ; , s. 166-171
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Konferensbidrag (refereegranskat)abstract
- DSP systems are often modeled using functional and bit-true level simulators, where it is not possible to validate the system level timing, control and configuration (SLTCC) of the product. In this paper, we present a methodology that adds SLTCC specified in grammar to functional models to create a rate true system level virtual prototype. The methodology is illustrated and benefits are quantified using two realistic examples
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- Hitana, Tahar, et al.
(författare)
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Bridging concurrent and non-concurrent error detection in FIR filters
- 2004
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Ingår i: 22ND NORCHIP CONFERENCE, PROCEEDINGS. - NEW YORK : IEEE. - 0780385101 ; , s. 75-78
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Konferensbidrag (refereegranskat)abstract
- Maintaining high reliability in fault detection is a prominent concern in case of life critical missions. In this paper, we describe how the invariant-based technique has been improved and extended. It is shown that the detection time latency can be considerably reduced. In order to widen the fault coverage and fully control the detection time, a cost effective nonconcurrent error detection scheme is proposed. The results indicate that, for any specified checking period, 100% non-concurrent error detection is possible.
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