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- Deivasigamani, M., et al.
(författare)
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Concept and design of exhaustive-parallel search algorithm for Network-on-Chip
- 2011
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Ingår i: Int. Syst. Chip Conf.. - 9781457716164 ; , s. 150-155
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Konferensbidrag (refereegranskat)abstract
- This paper presents the concept and design of exhaustive-parallel search algorithm for Network-on-Chip. The proposed parallel algorithm searches minimal path between source and destination in a forward-wave-propagation manner. The algorithm guarantees setup latency if the setup path exists. A high performance switch is designed to support exhaustive-parallel search algorithm. The NoC fabric is designed for 88 mesh architecture and its performance is evaluated.
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