| 1. |
- Heuser, M, et al.
(författare)
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Fabrication of wire-MOSFETs on silicon-on-insulator substrate
- 2002
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Ingår i: Microelectronic Engineering. - 0167-9317 .- 1873-5568. ; 61-2, s. 613-618
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Tidskriftsartikel (refereegranskat)abstract
- This paper describes the simulation and fabrication of N-type wire-MOSFETs with a multigate structure fabricated on silicon-on-insulator (SOI) material. Both simulations as well as experiments show that short channel effects (SCE) can be reduced by decreasing the channel width of the transistors below 100 nm. The triple-sided gate generates principally higher potential barriers in the channel, suppressing punch through effects significantly. (C) 2002 Elsevier Science B.V. All rights reserved.
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| 2. |
- Lemme, Max C., 1970-, et al.
(författare)
-
Influence of channel width on n- and p-type nano-wire-MOSFETs on silicon on insulator substrate
- 2003
-
Ingår i: Microelectronic Engineering. - 0167-9317 .- 1873-5568. ; 67-8, s. 810-817
-
Tidskriftsartikel (refereegranskat)abstract
- The fabrication and characterization of nanoscale n- and p-type multi-wire metal-oxide semiconductor field effect transistors (MOSFETs) with a triple gate structure on silicon-on-insulator material (SOI) is described in this paper. Experimental results are compared to simulation with special emphasis on the influence of channel width on the subthreshold behavior. Experiment and simulation show that the threshold voltage depends strongly on the wire width at dimensions below 100 urn. It is further shown that the transition from partial to full channel depletion is dependent on channel geometry. Finally, an increased on-current per chip area is demonstrated for triple-gate SOI MOSFETs compared to planar SOI devices. (C) 2003 Elsevier Science B.V. All rights reserved.
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| 3. |
- Lemme, Max C., 1970-, et al.
(författare)
-
Subthreshold behavior of triple-gate MOSFETs on SOI material
- 2004
-
Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:4, s. 529-534
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Tidskriftsartikel (refereegranskat)abstract
- The fabrication of n-type multi-wire MOSFETs on SOI material with triple-gate structures is presented. The output and transfer characteristics of devices with a gate length of 70 nm and a MESA width of 22 nm demonstrate clearly the suppression of short channel effects (SCE). In addition, these triple-gate structures are compared with planar SOI devices of comparable dimensions. The influence of biasing the substrate (back gate) is analyzed and compared to simulation data.
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