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Sökning: WFRF:(Jafari Jam Reza)

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1.
  • Chen, Yang, et al. (författare)
  • Semiconductor nanowire array for transparent photovoltaic applications
  • 2021
  • Ingår i: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 118:19
  • Tidskriftsartikel (refereegranskat)abstract
    • The surface area of a building that could potentially be used for Building Integrated Photovoltaics would increase dramatically with the availability of transparent solar cells that could replace windows. The challenge is to capture energy from outside the visible region (UV or IR) while simultaneously allowing a high-quality observation of the outside world and transmitting sufficient light in the visible region to satisfactorily illuminate the interior of the building. In this paper, we show both computationally and experimentally that InP nanowire arrays can have good transparency in the visible region and high absorption in the near-infrared region. We show experimentally that we can achieve mean transparencies in the visible region of 65% and the radiative limit of more than 10% based on measured absorption and calculated emission. Our results demonstrate that nanowire arrays hold promise as a method to achieve transparent solar cells, which would fulfill the requirements to function as windows. In addition, we show that by optical design and by designing the geometry of nanowire arrays, solar cells can be achieved that absorb/transmit at wavelengths that are not decided by the bandgap of the material and that can be tailored to specific requirements such as colorful windows.
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2.
  • Gómez, Víctor J., et al. (författare)
  • Wafer-scale nanofabrication of sub-100 nm arrays by deep-UV displacement Talbot lithography
  • 2020
  • Ingår i: Nanotechnology. - : IOP Publishing. - 0957-4484 .- 1361-6528. ; 31:29
  • Tidskriftsartikel (refereegranskat)abstract
    • In this manuscript, we demonstrate the potential of replacing the standard bottom anti-reflective coating (BARC) with a polymethylglutarimide (PMGI) layer for wafer-scale nanofabrication by means of deep-UV displacement talbot lithography (DTL). PMGI is functioning as a developable non-UV sensitive bottom anti-reflective coating (DBARC). After introducing the fabrication process using a standard BARC-based coating and the novel PMGI-based one, the DTL nanopatterning capabilities for both coatings are compared by means of the fabrication of etched nanoholes in a dielectric layer and metal nanodots made by lift-off. Improvement of DTL capabilities are attributed to a reduction of process complexity by avoiding the use of O2 plasma etching of the BARC layer. We show the capacity of this approach to produce nanoholes or nanodots with diameters ranging from 95 to 200 nm at a wafer-scale using only one mask and a proper exposing dose. The minimum diameter of the nanoholes is reduced from 118 to 95 nm when using the PMGI-based coating instead of the BARC-based one. The possibilities opened by the PMGI-based coating are illustrated by the successful fabrication of an array of nanoholes with sub-100 nm diameter for GaAs nanowire growth on a 2″ GaAs wafer, a 2″ nanoimprint lithography (NIL) master stamp, and an array of Au nanodots made by lift-off on a 4″ silica wafer. Therefore, DTL possess the potential for wafer-scale manufacturing of nano-engineered materials.
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3.
  • Jafari Jam, Reza (författare)
  • Advanced patterning and processing for III-V nanowire device fabrication
  • 2019
  • Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
    • Semiconductor nanowires are widely considered as promising candidates for next generations of electronics and optoelectronics. Gold seed particles have so far been recognized as the most important catalyst for growth of nanowires. Costs related to substrates, lithography processes and gold consumption most strongly influence the final cost of nanowire-based devices. An optimum gold deposition process can facilitate reuse of substrates, avoid repetitive lithography processes and reduce the gold consumption in order to reduce the cost of the final device. Moreover, a novel deposition process is needed to deposit gold seeds in complex nanoscale templates used for guided growth of nanowires, and subsequent device fabrication, on commercially viable (001)-oriented Si and SOI substrates.In this work, we report on nanowire seed definition by gold electrodeposition. Electron microscopy inspection and optical spectroscopy confirm that the subsequently grown III-V nanowires have surface morphology and crystal quality comparable to those of nanowires grown from seed particles defined by conventional thermal evaporation. For seeding of substrates used in a typical growth run, we used around 650 times less gold compared to thermal evaporation. We also demonstrated the possibility of depositing seed particles in deep holes etched in thick templates to facilitate template-assisted growth of nanowires on (001) Si and InP substrates. In addition to a functional p-n junction on an (001) InP substrate, the first reported InP-InAs-InP axial heterostructures on an (001) substrate was demonstrated.In order to reuse the substrate for multiple growth runs, growth of AlAs-GaAs nanowires for epitaxial lift-off was realized. Using selective gold electrodeposition, we demonstrated deposition of seed particles on a substrate after nanowire peel-off. AlAs-GaAs nanowires were subsequently regrown demonstrating the potential of this novel technique for substrate reuse.
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4.
  • Jafari Jam, Reza (författare)
  • Gold Electrodeposition in Semiconductor Nanowire Technology
  • 2017
  • Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
    • Semiconductor nanowires are widely considered as promising candidates for next generations of electronics and optoelectronics. Gold seed particles have so far been recognized as the most important catalyst for growth of nanowires. Costs related to substrates, lithography processes and gold consumption most strongly influence the final cost of nanowire-based devices. An optimum gold deposition process can facilitate re-use of substrates, avoid repetitive lithogra-phy processes and reduce the gold consumption in order to reduce the cost of the final device. In this work, we report on nanowire seed definition by gold electrodeposition. Electron microscopy inspection and optical spectroscopy confirm that the subsequently grown III-V nanowires have surface morphology and crystal quality comparable to those of nanowires grown from seed particles defined by conventional thermal evaporation. For seeding of substrates used in a typical growth run, we used around 650 times less gold with a 10 times higher throughput as compared to thermal evaporation. Using selective gold electrodeposition, we demonstrated redeposition of seed particles on a substrate after nanowire peel-off in order to reuse it for multiple growth runs. We also demonstrated the possibility of depositing seed particles in deep holes etched in thick masks to facilitate template-assisted growth of nanowires on (001) substrates.
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5.
  • Jafari Jam, Reza, et al. (författare)
  • III-V nanowire synthesis by use of electrodeposited gold particles
  • 2015
  • Ingår i: Nano letters (Print). - Washington, DC : American Chemical Society (ACS). - 1530-6984 .- 1530-6992. ; 15:1, s. 134-138
  • Tidskriftsartikel (refereegranskat)abstract
    • Semiconductor nanowires are great candidates for building novel electronic devices. Considering the cost of fabricating such devices, substrate reuse and gold consumption are the main concerns. Here we report on implementation of high throughput gold electrodeposition for selective deposition of metal seed particles in arrays defined by lithography for nanowire synthesis. By use of this method, a reduction in gold consumption by a factor of at least 300 was achieved, as compared to conventional thermal evaporation for the same pattern. Because this method also facilitates substrate reuse, a significantly reduced cost of the final device is expected. We investigate the morphology, crystallography, and optical properties of InP and GaAs nanowires grown from electrodeposited gold seed particles and compare them with the properties of nanowires grown from seed particles defined by thermal evaporation of gold. We find that nanowire synthesis, as well as the material properties of the grown nanowires are comparable and quite independent of the gold deposition technique. On the basis of these results, electrodeposition is proposed as a key technology for large-scale fabrication of nanowire-based devices.
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6.
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7.
  • Jafari Jam, Reza, et al. (författare)
  • Template-assisted vapour-liquid-solid growth of InP nanowires on (001) InP and Si substrates
  • 2020
  • Ingår i: Nanoscale. - Cambridge : Royal Society of Chemistry. - 2040-3364 .- 2040-3372. ; 12:2, s. 888-894
  • Tidskriftsartikel (refereegranskat)abstract
    • We report on the synthesis of vertical InP nanowire arrays on (001) InP and Si substrates using template-assisted vapour-liquid-solid growth. A thick silicon oxide layer was first deposited on the substrates. The samples were then patterned by electron beam lithography and deep dry etching through the oxide layer down to the substrate surface. Gold seed particles were subsequently deposited in the holes of the pattern by the use of pulse electrodeposition. The subsequent growth of nanowires by the vapour-liquid-solid method was guided towards the [001] direction by the patterned oxide template, and displayed a high growth yield with respect to the array of holes in the template. In order to confirm the versatility and robustness of the process, we have also demonstrated guided growth of InP nanowire p-n junctions and InP/InAs/InP nanowire heterostructures on (001) InP substrates. Our results show a promising route to monolithically integrate III-V nanowire heterostructure devices with commercially viable (001) silicon platforms.
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8.
  • Li, Jun, et al. (författare)
  • Tolerance of metal halide perovskites to mechanical treatment enables the fabrication of patterned luminescence nano- and microstructures
  • 2022
  • Ingår i: Materials Advances. - : Royal Society of Chemistry (RSC). - 2633-5409. ; 27:35
  • Tidskriftsartikel (refereegranskat)abstract
    • Metal halide perovskites have shown a great performance in a broad range of optoelectronic devices. The variety of preparation methods makes perovskites especially attractive, yet preparation of complex nanostructures based on these materials remains challenging. Here we present a template assisted method allowing to achieve any pre-designed arrangement of methylammonium lead triiodide (MAPbI3) polycrystalline patterns with the spatial resolution defined by the template. We utilized a Si/SiO2 wafer with circular 180 nm deep recesses with diameters ranging from 200 to 1600 nm as a template. A polycrystalline perovskite powder was obtained by scratching off a thin perovskite film and mechanically introduced into the patterned template as a pigment. Scanning electron microscopy revealed that the recesses are filled with tightly packed sub-20 nm crystallites. Considering that the spin-coated film used as a source of MAPbI3 consisted of grains up to 2000 nm in diameter suggests that the initially prepared grains were crashed by rubbing to much smaller crystallites. In spite of this harsh mechanical treatment, the filled recesses showed a strong photoluminescence signal, demonstrating the applicability of this approach for the fabrication of diverse nanophotonic structures.
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9.
  • Löfstrand, Anette, et al. (författare)
  • Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
  • 2022
  • Ingår i: Advanced Electronic Materials. - : Wiley. - 2199-160X. ; 8:9
  • Tidskriftsartikel (refereegranskat)abstract
    • Fabrication of next generation transistors calls for new technological requirements, such as reduced size and increased density of structures. Development of cost‐effective processing techniques to fabricate small‐pitch vertical III–V nanowires over large areas will be an important step toward realizing dense gate all‐around transistors, having high electron mobility, and low power consumption. It is demonstrated here, how arrays of III–V nanowires with a controllable number of rows, ranging from one single row up to bands of 500 nm, can be processed by directed self‐assembly (DSA) of block copolymer (BCP). Furthermore, it is shown that the DSA‐orientation with respect to the substrate's crystal direction affects the nanowire facet configuration, and thereby the nanowire spacing and gate all‐around deposition possibilities. A high χ poly(styrene)‐block‐poly(4‐vinylpyridine) BCP pattern directed by electron beam lithography‐defined guiding lines is transferred into silicon nitride. The silicon nitride is then used as a selective area metal‐organic vapor phase epitaxy mask atop an indium arsenide (InAs) buffer layer on a silicon platform to grow vertical InAs nanowires at 44–60 nm row pitch. Finally, deposition of high‐κ oxide and titanium nitride at this high pattern density is demonstrated, to further illustrate the considerations needed for next generation transistors. Directed self‐assembly of block copolymers is a cost‐effective technique suitable for high patterning densities. Here it is used to enable vertical III–V nanowire growth at ≈54 nm row pitch on a silicon platform in two different nanowire configurations. Furthermore, a path for gate all‐around deposition is explored, which could be of use for small footprint vertical transistor fabrication.
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10.
  • Löfstrand, Anette, et al. (författare)
  • Poly(styrene)- block-Maltoheptaose Films for Sub-10 nm Pattern Transfer : Implications for Transistor Fabrication
  • 2021
  • Ingår i: ACS Applied Nano Materials. - : American Chemical Society (ACS). - 2574-0970. ; 4:5, s. 5141-5151
  • Tidskriftsartikel (refereegranskat)abstract
    • Sequential infiltration synthesis (SIS) into poly(styrene)-block-maltoheptaose (PS-b-MH) block copolymer using vapors of trimethyl aluminum and water was used to prepare nanostructured surface layers. Prior to the infiltration, the PS-b-MH had been self-assembled into 12 nm pattern periodicity. Scanning electron microscopy indicated that horizontal alumina-like cylinders of 4.9 nm diameter were formed after eight infiltration cycles, while vertical cylinders were 1.3 nm larger. Using homopolymer hydroxyl-terminated poly(styrene) (PS-OH) and MH films, specular neutron reflectometry revealed a preferential reaction of precursors in the MH compared to PS-OH. The infiltration depth into the maltoheptaose homopolymer film was found to be 2.0 nm after the first couple of cycles. It reached 2.5 nm after eight infiltration cycles, and the alumina incorporation within this infiltrated layer corresponded to 23 vol % Al2O3. The alumina-like material, resulting from PS-b-MH infiltration, was used as an etch mask to transfer the sub-10 nm pattern into the underlying silicon substrate, to an aspect ratio of approximately 2:1. These results demonstrate the potential of exploiting SIS into carbohydrate-based polymers for nanofabrication and high pattern density applications, such as transistor devices.
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