| 1. |
- Grahn, J. V., et al.
(författare)
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A low-complexity 62-GHz f(T) SiGe heterojunction bipolar transistor process using differential epitaxy and in situ phosphorus-doped poly-Si emitter at very low thermal budget
- 2000
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Ingår i: Solid-State Electronics. - 0038-1101 .- 1879-2405. ; 44:3, s. 549-554
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Tidskriftsartikel (refereegranskat)abstract
- A low-complexity SiGe heterojunction bipolar transistor process based on differential epitaxy and in situ phosphorus doped polysilicon emitter technology is described. Silane-based chemical vapor deposition at reduced pressure was used for low-temperature SiGe epitaxy. Following SiGe epitaxy, the process temperature budget was kept very low with 900 degrees C for 10 s as the highest temperature step. A very high current gain of almost 2000 and cut off frequency of 62 GHz were achieved for a uniform 12% Ge profile. The breakdown voltage BVCEO and forward Early voltage were equal to 2.9 and 6.5 V, respectively.
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| 2. |
- Gylfason, Kristinn B., 1978-, et al.
(författare)
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Process considerations for layer-by-layer 3D patterning of silicon, using ion implantation, silicon deposition, and selective silicon etching
- 2012
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 30:6, s. 06FF05-
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Tidskriftsartikel (refereegranskat)abstract
- The authors study suitable process parameters, and the resulting pattern formation, in additive layer-by-layer fabrication of arbitrarily shaped three-dimensional (3D) silicon (Si) micro- and nanostructures. The layer-by-layer fabrication process investigated is based on alternating steps of chemical vapor deposition of Si and local implantation of gallium ions by focused ion beam writing. In a final step, the defined 3D structures are formed by etching the Si in potassium hydroxide, where the ion implantation provides the etching selectivity.
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| 3. |
- Johansson, Ted, et al.
(författare)
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Influence of SOI-generated stress on BiCMOS performance
- 2006
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 50:6, s. 935-942
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Tidskriftsartikel (refereegranskat)abstract
- Two BiCMOS processes were adapted for SOI and the performance of the bipolar devices was studied. Differences in electrical parameters were observed, in particular the current gain, which processing or doping profiles could not explain, but correlated with observed stress in transistors. Simulation of the process flow with stress included revealed that stress was generated to a higher degree in the SOI wafers in the presence of deep trench isolation (DTI). Theoretical estimations and electrical simulations with and without stress yielded results consistent with observed data. Thus, we conclude that the observed differences are caused by process-induced in-plane biaxial stress.
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| 4. |
- Bjorkholm, M., et al.
(författare)
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Treatment-related risk factors for transformation to acute myeloid leukemia and myelodysplastic syndromes in myeloproliferative neoplasms
- 2011
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Ingår i: Journal of Clinical Oncology. - : American Society of Clinical Oncology: JCO. - 0732-183X .- 1527-7755. ; 29:17, s. 2410-2415
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Tidskriftsartikel (refereegranskat)abstract
- Purpose: Patients with myeloproliferative neoplasms (MPNs), including polycythemia vera, essential thrombocythemia, and primary myelofibrosis, have a propensity to develop acute myeloid leukemia (AML) and myelodysplastic syndromes (MDSs). Using population-based data from Sweden, we assessed the role of MPN treatment and subsequent AML/MDS risk with special focus on the leukemogenic potential of hydroxyurea (HU). Methods: On the basis of a nationwide MPN cohort (N = 11,039), we conducted a nested case-control study, including 162 patients (153 and nine with subsequent AML and MDS diagnosis, respectively) and 242 matched controls. We obtained clinical and MPN treatment data for all patients. Using logistic regression, we calculated odds ratios (ORs) as measures of AML/MDS risk. Results: Forty-one (25%) of 162 patients with MPNs with AML/MDS development were never exposed to alkylating agents, radioactive phosphorous (P32), or HU. Compared with patients with who were not exposed to HU, the ORs for 1 to 499 g, 500 to 999 g, more than 1,000 g of HU were 1.5 (95% CI, 0.6 to 2.4), 1.4 (95% CI, 0.6 to 3.4), and 1.3 (95% CI, 0.5 to 3.3), respectively, for AML/MDS development (not significant). Patients with MPNs who received P32 greater than 1,000 MBq and alkylators greater than 1 g had a 4.6-fold (95% CI, 2.1 to 9.8; P = .002) and 3.4-fold (95% CI, 1.1 to 10.6; P = .015) increased risk of AML/MDS, respectively. Patients receiving two or more cytoreductive treatments had a 2.9-fold (95% CI, 1.4 to 5.9) increased risk of transformation. Conclusion: The risk of AML/MDS development after MPN diagnosis was significantly associated with high exposures of P32 and alkylators but not with HU treatment. Twenty-five percent of patients with MPNs who developed AML/MDS were not exposed to cytotoxic therapy, supporting a major role for nontreatment-related factors. © 2011 by American Society of Clinical Oncology.
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| 5. |
- Fischer, Andreas C., 1982-, et al.
(författare)
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3D Free-Form Patterning of Silicon by Ion Implantation, Silicon Deposition, and Selective Silicon Etching
- 2012
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Ingår i: Advanced Functional Materials. - : Wiley-VCH Verlagsgesellschaft. - 1616-301X .- 1616-3028. ; 22:19, s. 4004-4008
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Tidskriftsartikel (refereegranskat)abstract
- A method for additive layer-by-layer fabrication of arbitrarily shaped 3D silicon micro- and nanostructures is reported. The fabrication is based on alternating steps of chemical vapor deposition of silicon and local implantation of gallium ions by focused ion beam (FIB) writing. In a final step, the defined 3D structures are formed by etching the silicon in potassium hydroxide (KOH), in which the local ion implantation provides the etching selectivity. The method is demonstrated by fabricating 3D structures made of two and three silicon layers, including suspended beams that are 40 nm thick, 500 nm wide, and 4 μm long, and patterned lines that are 33 nm wide.
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| 6. |
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| 7. |
- Fischer, Andreas C., et al.
(författare)
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Layer-by-layer 3D printing of Si micro- and nanostructures by Si deposition, ion implantation and selective Si etching
- 2012
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Ingår i: 12th IEEE Conference on Nanotechnology (IEEE-NANO), 2012. - : IEEE conference proceedings. - 9781467321983 ; , s. 1-4
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Konferensbidrag (refereegranskat)abstract
- In this paper we report a method for layer-by-layer printing of three-dimensional (3D) silicon (Si) micro- and nanostructures. This fabrication method is based on a sequence of alternating steps of chemical vapor deposition of Si and local implantation of gallium (Ga+) ions by focused ion beam (FIB) writing. The defined 3D structures are formed in a final step by selectively wet etching the non-implanted Si in potassium hydroxide (KOH). We demonstrate the viability of the method by fabricating 2 and 3-layer 3D Si structures, including suspended beams and patterned lines with dimensions on the nm-scale.
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| 8. |
- Thomas, Richard D., et al.
(författare)
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The double electrostatic ion ring experiment : A unique cryogenic electrostatic storage ring for merged ion-beams studies
- 2011
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Ingår i: Review of Scientific Instruments. - : AIP Publishing. - 0034-6748 .- 1089-7623. ; 82:6, s. 065112-
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Tidskriftsartikel (refereegranskat)abstract
- We describe the design of a novel type of storage device currently under construction at Stockholm University, Sweden, using purely electrostatic focussing and deflection elements, in which ion beams of opposite charges are confined under extreme high vacuum cryogenic conditions in separate rings and merged over a common straight section. The construction of this double electrostatic ion ring experiment uniquely allows for studies of interactions between cations and anions at low and well-defined internal temperatures and centre-of-mass collision energies down to about 10 K and 10 meV, respectively. Position sensitive multi-hit detector systems have been extensively tested and proven to work in cryogenic environments and these will be used to measure correlations between reaction products in, for example, electron-transfer processes. The technical advantages of using purely electrostatic ion storage devices over magnetic ones are many, but the most relevant are: electrostatic elements which are more compact and easier to construct; remanent fields, hysteresis, and eddy-currents, which are of concern in magnetic devices, are no longer relevant; and electrical fields required to control the orbit of the ions are not only much easier to create and control than the corresponding magnetic fields, they also set no upper mass limit on the ions that can be stored. These technical differences are a boon to new areas of fundamental experimental research, not only in atomic and molecular physics but also in the boundaries of these fields with chemistry and biology. For examples, studies of interactions with internally cold molecular ions will be particular useful for applications in astrophysics, while studies of solvated ionic clusters will be of relevance to aeronomy and biology.
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| 9. |
- Abedin, Ahmad, et al.
(författare)
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Germanium on Insulator Fabrication for Monolithic 3-D Integration
- 2018
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Ingår i: IEEE Journal of the Electron Devices Society. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 2168-6734. ; 6:1, s. 588-593
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Tidskriftsartikel (refereegranskat)abstract
- A low temperature (T-max = 350 degrees C) process for Germanium (Ge) on insulator (GOI) substrate fabrication with thicknesses of less than 25 nm is reported in this paper. The process is based on a single step epitaxial growth of a Ge/SiGe/Ge stack on Si, room temperature wafer bonding and an etch-back process using Si0.5Ge0.5 as an etch-stop layer. GOI substrates with surface roughness below 0.5 nm, 0.15% tensile strain, thickness nonuniformity of less than 3 nm and residual p-type doping of less than 1016 cm(-3) were fabricated. Ge pFETs are fabricated (T-max = 600 degrees C) on the GOI wafer with 70% yield. The devices exhibit a negative threshold voltage of -0.18 V and 60% higher mobility than the SOI pFET reference devices.
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| 10. |
- Abedin, Ahmad, et al.
(författare)
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GOI fabrication for monolithic 3D integration
- 2018
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Ingår i: 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781538637654 ; , s. 1-3
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Konferensbidrag (refereegranskat)abstract
- A low temperature (Tmax=350 °C) process for Ge on insulator (GOI) substrate fabrication with thicknesses of less than 25 nm is reported in this work. The process is based on a single step epitaxial growth of a Ge/SiGe/Ge stack on Si, room temperature wafer bonding, and an etch-back process using Si0.5Ge0.5 as an etch-stop layer. Using this technique, GOI substrates with surface roughness below 0.5 nm, thickness nonuniformity of less than 3 nm, and residual p-type doping of less than 1016 cm-3 are achieved. Ge pFETs are fabricated (Tmax=600 °C) on the GOI wafer with 70% yield. The devices exhibit a negative threshold voltage of-0.18 V and 60% higher mobility than the SOI pFET reference devices.
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