| 1. |
- Athle, Robin, et al.
(författare)
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Effects of TiN Top Electrode Texturing on Ferroelectricity in Hf1-xZrxO2
- 2021
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Ingår i: ACS applied materials & interfaces. - : American Chemical Society (ACS). - 1944-8244 .- 1944-8252. ; 13:9, s. 11089-11095
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Tidskriftsartikel (refereegranskat)abstract
- Ferroelectric memories based on hafnium oxide are an attractive alternative to conventional memory technologies due to their scalability and energy efficiency. However, there are still many open questions regarding the optimal material stack and processing conditions for reliable device performance. Here, we report on the impact of the sputtering process conditions of the commonly used TiN top electrode on the ferroelectric properties of Hf1-xZrxO2. By manipulating the deposition pressure and chemistry, we control the preferential orientation of the TiN grains between (111) and (002). We observe that (111) textured TiN is superior to (002) texturing for achieving high remanent polarization (Pr). Furthermore, we find that additional nitrogen supply during TiN deposition leads to >5× greater endurance, possibly by limiting the scavenging of oxygen from the Hf1-xZrxO2 film. These results help explain the large Pr variation reported in the literature for Hf1-xZrxO2/TiN and highlights the necessity of tuning the top electrode of the ferroelectric stack for successful device implementation.
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| 2. |
- Löfstrand, Anette, et al.
(författare)
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Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
- 2022
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Ingår i: Advanced Electronic Materials. - : Wiley. - 2199-160X. ; 8:9
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Tidskriftsartikel (refereegranskat)abstract
- Fabrication of next generation transistors calls for new technological requirements, such as reduced size and increased density of structures. Development of cost‐effective processing techniques to fabricate small‐pitch vertical III–V nanowires over large areas will be an important step toward realizing dense gate all‐around transistors, having high electron mobility, and low power consumption. It is demonstrated here, how arrays of III–V nanowires with a controllable number of rows, ranging from one single row up to bands of 500 nm, can be processed by directed self‐assembly (DSA) of block copolymer (BCP). Furthermore, it is shown that the DSA‐orientation with respect to the substrate's crystal direction affects the nanowire facet configuration, and thereby the nanowire spacing and gate all‐around deposition possibilities. A high χ poly(styrene)‐block‐poly(4‐vinylpyridine) BCP pattern directed by electron beam lithography‐defined guiding lines is transferred into silicon nitride. The silicon nitride is then used as a selective area metal‐organic vapor phase epitaxy mask atop an indium arsenide (InAs) buffer layer on a silicon platform to grow vertical InAs nanowires at 44–60 nm row pitch. Finally, deposition of high‐κ oxide and titanium nitride at this high pattern density is demonstrated, to further illustrate the considerations needed for next generation transistors. Directed self‐assembly of block copolymers is a cost‐effective technique suitable for high patterning densities. Here it is used to enable vertical III–V nanowire growth at ≈54 nm row pitch on a silicon platform in two different nanowire configurations. Furthermore, a path for gate all‐around deposition is explored, which could be of use for small footprint vertical transistor fabrication.
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| 3. |
- Menon, Heera, et al.
(författare)
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Fabrication of Single-Crystalline InSb-on-Insulator by Rapid Melt Growth
- 2022
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Ingår i: Physica Status Solidi (A) Applications and Materials Science. - : Wiley. - 1862-6300. ; 219:4
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Tidskriftsartikel (refereegranskat)abstract
- InSb has the smallest bandgap and highest electron mobility among III-V semiconductors and is widely used for photodetectors and high-frequency electronic applications. Integration of InSb directly on Si would drastically reduce the fabrication cost and enable new applications, however, it is very challenging due to its 19% lattice mismatch with Si. Herein, the integration of single-crystalline InSb microstructures on insulator-covered Si through rapid melt growth (RMG) is reported and specifically provides details on the fabrication process. The importance of achieving high-quality conformal capping layers at low thermal budget to contain the InSb melt is assessed when the sample is annealed. The importance of ensuring a pristine Si seed area to achieve single-crystalline InSb is illustrated and demonstrated here for the first time.
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| 4. |
- Menon, Heera, et al.
(författare)
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Improved quality of InSb-on-insulator microstructures by flash annealing into melt
- 2021
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Ingår i: Nanotechnology. - : IOP Publishing. - 0957-4484 .- 1361-6528. ; 32:16
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Tidskriftsartikel (refereegranskat)abstract
- Monolithic integration of III-V semiconductors with Silicon technology has instigated a wide range of new possibilities in the semiconductor industry, such as combination of digital circuits with optical sensing and high-frequency communication. A promising CMOS compatible integration process is rapid melt growth (RMG) that can yield high quality single crystalline material at low cost. This paper represents the study on ultra-thin InSb-on-insulator microstructures integrated on a Si platform by a RMG-like process. We utilize flash lamp annealing (FLA) to melt and recrystallize the InSb material for an ultra-short duration (milliseconds), to reduce the thermal budget necessary for integration with Si technology. We compare the result from FLA to regular rapid thermal annealing (seconds). Recrystallized InSb was characterized using electron back scatter diffraction which indicate a transition from nanocrystalline structure to a crystal structure with grain sizes exceeding 1 μm after the process. We further see a 100× improvement in electrical resistivity by FLA annealed sample when compared to the as-deposited InSb with an average Hall mobility of 3100 cm2 V−1 s−1 making this a promising step towards realizing monolithic mid-infrared detectors and quantum devices based on InSb.
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| 5. |
- Menon, Heera
(författare)
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Infrared Photodetectors based on InSb and InAs Nanostructures via Heterogeneous Integration-Rapid Melt Growth and Template Assisted Selective Epitaxy
- 2023
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Monolithic heterogeneous integration of III-V semiconductors with the contemporary Si Complementary Metal Oxide Semiconductor (CMOS) technology has instigated a wide range of possibilities and functionalities in the semiconductor industry, in the field of digital circuits, optical sensors, light emitters, and high-frequency communication devices. However, the integration of III-V semiconductors is not trivial due to the differences in lattice parameters, polarity, and thermal expansion coefficient. This thesis explores two integrationtechniques to form III-V nanostructures with potential applications in the infrared detection field.The first technique implemented in this thesis work is the Rapid Melt Growth technique. InSb, which has a large lattice mismatch (19%) to Si, is used to demonstrate the RMG integration technique. A flash lamp with a millisecond annealing technique is utilized to melt and recrystallize amorphous InSb material to form a single crystalline material. The development of the fabrication process and the experimental results for obtaining a single crystalline InSb-on-insulator from a Si seed area through the RMG process are presented. Electron Back Scatter Diffraction (EBSD) technique was employed to understand the crystal quality, orientation, and defects in the RMG InSb nanostructures. The InSb nanostructures have a resistivity of 10 mΩ cm, similar to the VLS-grown InSb nanowires.Mobility ranging from 3490 - 877 cm2/ V sec was extracted through Hall and Van der Pauw measurements. Finally, we report the first monolithic integrated InSb nanostructure photodetector on Si through the RMG process. Detailed optical and electrical characterization of the device, including the spectrally resolved photocurrent and the temperature-dependent dark current, is studied. The thesis presents an InSb photodetector with a stable photodetector with a responsivity of 0.5 A/W at 16 nW illumination and millisecond time response.The second integration technique implemented in this thesis work is Template Assisted Selective Epitaxy. Here, the versatility of TASE technique to integrate InAs nanowires on W metal seed is demonstrated. This technique enables the feasibility of integrating III-V semiconductors to back -end of the line integration with Si CMOS technology. EBSD technique was utilized to study and obtain the statistics on the single crystalline InAs nanowires grown from different diameter templates. We also demonstrate the possibility of achieving an nBn InAs detector using TASE on W approach. This technique is a promising step towards developinghigh operating temperature (HOT) monolithic integrated mid-infrared detectors. Thus, the results of this thesis provide the perspective into two viable CMOS-compatible III-V integration techniques that could be utilized for photodetector applications at a reduced cost.
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| 6. |
- Menon, Heera, et al.
(författare)
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Integration of InSb on Si by Rapid Melt Growth
- 2019
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Konferensbidrag (refereegranskat)abstract
- Monolithic integration of III-V semiconductors with Silicon technology has instigated a wide range of new possibilities in the semiconductor industry, such as combination of digital circuits with optical sensing and high-frequency communication. Dissimilarities in the crystal structure symmetry and large lattice mismatch between III-V’s and Si are the challenges that prevent direct epitaxial growth of III-V on Si. A promising method is Rapid Melt Growth (RMG) which integrates high-quality single crystalline III-V microstructures at low cost and in a process that is CMOS compatible1. In this growth, amorphous source material is deposited inside a micro-crucible with a nano-scale opening (seed) to the Si substrate. When the material is annealed above its melting point, the crucible contains the liquid. On cooling, epitaxial growth occurs from the seed to the end of the structure, resulting in a high quality crystal as strain-induced misfit dislocations are confined to the region near the seed. RMG of Ge on insulator [1], GaAs2, GaSb2 and InAs3 has been reported. In this work we have developed for the first time the RMG process for integrating InSb nano and microstructures on Si. Such InSb materials are promising for integrated optoelectronics (mid-infrared) and topological quantum devices. We will here describe the process development and characterization of the resulting InSb material using x-ray diffraction, electron backscatter diffraction, atomic force microscopy, and electrical measurements. 1. Liu et al. APL. 84, 2563 (2004).2. Chen et al. Electron Dev Lett. 31, 11 (2010).3. Yuan et al. Symp VLSI Tech Dig. T54-5 (2013)
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| 7. |
- Menon, Heera, et al.
(författare)
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Monolithic InSb nanostructure photodetectors on Si using rapid melt growth
- 2023
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Ingår i: Nanoscale Advances. - Cambridge : Royal Society of Chemistry. - 2516-0230. ; 5:4, s. 1152-1162
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Tidskriftsartikel (refereegranskat)abstract
- Monolithic integration of InSb on Si could be a key enabler for future electronic and optoelectronic applications. In this work, we report the fabrication of InSb metal-semiconductor-metal photodetectors directly on Si using a CMOS-compatible process known as rapid melt growth. Fourier transform spectroscopy demonstrates a spectrally resolved photocurrent peak from a single crystalline InSb nanostructure with dimensions of 500 nm × 1.1 μm × 120 nm. Time-dependent optical characterization of a device under 1550 nm illumination indicated a stable photoresponse with responsivity of 0.50 A W−1 at 16 nW illumination, with a time constant in the range of milliseconds. Electron backscatter diffraction spectroscopy revealed that the single crystalline InSb nanostructures contain occasional twin defects and crystal lattice twist around the growth axis, in addition to residual strain, possibly causing the observation of a low-energy tail in the detector response extending the photosensitivity out to 10 μm wavelengths (0.12 eV) at 77 K. © 2023 RSC.
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| 8. |
- Svensson, Johannes, et al.
(författare)
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Template-Assisted Selective Epitaxy of InAs on W
- 2022
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Ingår i: 2022 Compound Semiconductor Week, CSW 2022. - 9781665453400
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Konferensbidrag (refereegranskat)abstract
- Results on integration of InAs on W films through template assisted selective epitaxy are presented. The InAs crystals are analysed using SEM, electron beam backscattering and in-situ electrical measurements. A high yield of single crystalline InAs can be obtained for certain template diameters and pitches which demonstrates that this is a viable route to integrate III-V semiconductors in the back-end-of-line of CMOS circuits for added functionality.
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| 9. |
- Svensson, Johannes, et al.
(författare)
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Three-Dimensional Integration of InAs Nanowires by Template-Assisted Selective Epitaxy on Tungsten
- 2023
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Ingår i: Nano Letters. - 1530-6984. ; 23:11, s. 4756-4761
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Tidskriftsartikel (refereegranskat)abstract
- 3D integration of III-V semiconductors with Si CMOS is highly attractive since it allows combining new functions such as photonic and analog devices with digital signal processing circuitry. Thus far, most 3D integration approaches have used epitaxial growth on Si, layer transfer by wafer bonding, or die-to-die packaging. Here we present low-temperature integration of InAs on W using Si3N4 template assisted selective area metal-organic vapor-phase epitaxy (MOVPE). Despite growth nucleation on polycrystalline W, we can obtain a high yield of single-crystalline InAs nanowires, as observed by transmission electron microscopy (TEM) and electron backscatter diffraction (EBSD). The nanowires exhibit a mobility of 690 cm2/(V s), a low-resistive, Ohmic electrical contact to the W film, and a resistivity which increases with diameter attributed to increased grain boundary scattering. These results demonstrate the feasibility for single-crystalline III-V back-end-of-line integration with a low thermal budget compatible with Si CMOS.
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