| 1. |
- Carlsson, Jonas, 1972-
(författare)
-
Contributions to Asynchronous Communication Ports for GALS Systems
- 2006
-
Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Digital systems commonly use a single global clock signal to synchronize the whole system. This is not always possible and it can be more advantageously to divide the system into separate clock domains, where each clock domain can operate with its own clock frequency. Communication between the different clock domains are not trivial and must be handled with care. Several schemes can be used depending on the relation between the clock frequencies of the communicating clock domains. This thesis focuses on the Globally Asynchronous Locally Synchronous (GALS) scheme, in which all communications between clock domains are handled using dedicated communication channels. These communication channels use asynchronous handshaking protocols to transfer information between clock domains. No global clock signal is used and the clock signal is instead local for each clock domain.An efficient design flow for GALS system has been developed, which allows a designer to implement GALS systems without prior knowledge of asynchronous circuits. The GALS design flow starts with a high-level model of the system behavior and ends with an implementation in an FPGA or an ASIC. The design flow can also increase the design efficiency for GALS system since the flow alleviates the design and placement of the asynchronous circuits for the designer. A tool that handles the asynchronous circuits in the design flow has been developed.Two types of communication ports have been developed to handle the communication between clock domains. Both of these ports can be used in systems with static schedule or dynamic schedule of transactions. One of the communication ports can easily be migrated to a new CMOS process, since it only uses standard-cells that care provided by most vendors of CMOS processes. A clock gating circuit has been developed to allow a clock domain to use an external stable clock signal to create an internal stoppable clock signal. A stoppable local clock is used to eliminate problems with metastability when transferring data between clock domains with arbitrary clock frequencies.In order to validate the design flow and proposed circuitry, has an integrated circuit for 2-dimensional Discrete Cosine Transform been implemented using the GALS scheme and one of the proposed communication ports. The circuit has been implemented using a standard-cell library in a 0.35 mm CMOS process. A few possible improvements to the implementation are also discussed in the thesis.The GALS design flow with the asynchronous wrapper generation tool has been used to implement the digital baseband processing in the physical layer of the IEEE 802.11a transmitter. The transmitter is built using multiple clock domains. The transmitter has been implemented and tested in a Stratix II FPGA.
|
|
| 2. |
- Carlsson, Jonas, 1972-
(författare)
-
Studies on asynchronous communication ports for GALS systems
- 2005
-
Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Digital systems generally use a global clock signal for the whole system. A System-on-Chip may have to communicate with the environment, using several different data rates that does not fit well to the single global clock frequency. When designing a digital system, it might be beneficial to divide the system into different clock domains where each domain can operate with its own clock frequency.In this thesis, various clocking schemes are discussed. The synchronous clocking schemes that are discussed are mesochronous, plesiochronous, rational, oversampling and arbitrary clocking schemes.The thesis focuses on the Globally Asynchronous Locally Synchronous scheme. This scheme transfers information between the different clock domains through dedicated communication channels. These communication channels use asynchronous handshaking protocols to transfer information without the necessity for a clock.A communication channel consists of a transmitting and receiving port. Two types of communication ports are proposed in the thesis. The communication ports can be used either in a system with a static schedule or dynamic schedule of transactions. One of the ports can easily be implemented in different CMOS processes, since it only uses standard cells that can be found in most existing CMOS processes standard library.A 2-dimensional Discrete Cosine Transform has been implemented using the GALS scheme and one of the proposed communication ports. The 2-D DCT has been implemented using a standard cell library supplied by AMS fora 0.35 µm CMOS process. A few improvements to the implementation are also discussed in the thesis.
|
|
| 3. |
- Tsog, Nandinbaatar
(författare)
-
Improving On-Board Data Processing using CPU-GPU Heterogeneous Architectures for Real-Time Systems
- 2019
-
Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis investigates the efficacy of heterogeneous computing architectures in real-time systems.The goals of the thesis are twofold. First, to investigate various characteristics of the Heterogeneous System Architectures (HSA) compliant reference platforms focusing on computing performance and power consumption. The investigation is focused on the new technologies that could boost on-board data processing systems in satellites and spacecraft. Second, to enhance the usage of the heterogeneous processing units by introducing a technique for static allocation of parallel segments of tasks.The investigation and experimental evaluation show that our method of GPU allocation for the parallel segments of tasks is more energy efficient compared to any other studied allocation. The investigation is conducted under different types of environments, such as process-level isolated environment, different software stacks, including kernels, and various task set scenarios. The evaluation results indicate that a balanced use of heterogeneous processing units (CPU and GPU) could improve schedulability of task sets up to 90% with the proposed allocation technique.
|
|
| 4. |
- Tsog, Nandinbaatar
(författare)
-
Space Computing using COTS Heterogeneous Platforms : Intelligent On-Board Data Processing in Space Systems
- 2021
-
Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Space computing enriches space activities such as deep-space explorations and in-orbit intelligent decision making. The awareness of space computing is growing due to the technological advances of high-performance commercial off-the-shelf (COTS) computing platforms. Space offers a complex, constrained and challengeable environment to the developers, researchers, as well as human beings. The challenges are size, weight and power (SWaP) constraints, real-time requirements, communication limitations as well as radiation effects. The research conducted in this thesis aims at investigating and supporting intelligent on-board data processing using COTS heterogeneous computing platforms in space systems. These platforms embed at least one Central Processing Unit (CPU) and one Graphics Processing Unit (GPU) on the same chip. The main goal of the research presented in this thesis is twofold. First, to investigate the heterogeneous computing platforms for the purpose of proposing a solution to tackle the above-mentioned challenges in space systems. Second, to complement the proposed solution with novel scheduling techniques for real-time applications that run on COTS heterogeneous platforms under harsh environments like space.The proposed techniques are based on the system model that considers the use of alternative executions of parallel segments of tasks. Although offloading a parallel segment to a parallel computation unit (such as GPU) improves the best-case execution times of most applications, it can increase the response times of tasks in some applications due to the overuse of GPU. Hence, the use of the proposed task model can be a key to decrease the response times of tasks and improve schedulability of the system. The server-based proposed scheduling techniques support the proposed task model by guaranteeing the execution slot for parallel segments on CPU(s). The experimental evaluation conducted in this thesis shows that the proposed task model can improve the schedulability of the real-time systems up to 90% with the static allocation of applications. Moreover, the dynamic allocation method using the server-based scheduling with the proposed task model can improve the schedulability up to 16%. Finally, the thesis presents a simulation tool that simulates real-time applications using the proposed task model while considering the different levels of radiation tolerance to different processing units.
|
|
