| 1. |
- Rangasamy, Gautham, et al.
(författare)
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gm/Id Analysis of vertical nanowire III–V TFETs
- 2023
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Ingår i: Electronics Letters. - 1350-911X. ; 59:18
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Tidskriftsartikel (refereegranskat)abstract
- Experimental data on analog performance of gate-all-around III-V vertical Tunnel Field-Effect Transistors (TFETs) and circuits are presented. The individual device shows a minimal subthreshold swing of 44 mV/dec and transconductance efficiency of 50 V−1 for current range of 9 nA/μm to 100 nA/μm and at a drain voltage of 100 mV. This TFET demonstrates translinearity between transconductance and drain current for over a decade of current, paving way for low power current-mode analog IC design. To explore this design principle, a current conveyor circuit is implemented, which exhibits large-signal voltage gain of 0.89 mV/mV, current gain of 1nA/nA and an operating frequency of 320 kHz. Furthermore, at higher drain bias of 500 mV, the device shows maximum transconductance of 72 μS/μm and maximum drain current of 26 μA/μm. The device, thereby, can be operated as a current mode device at lower bias voltage and as voltage mode device at higher bias voltage.
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| 2. |
- Rangasamy, Gautham, et al.
(författare)
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High Current Density Vertical Nanowire TFETs With I₆₀ > 1 μ A/ μ m
- 2023
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Ingår i: IEEE Access. - 2169-3536. ; 11, s. 95692-95696
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Tidskriftsartikel (refereegranskat)abstract
- We present experimental data for a vertical, 22-nm-diameter InAs/(In)GaAsSb nanowire Tunnel Field-Effect Transistor that exhibits the highest reported I60 of 1.2 μA/μm , paving the way for low power applications. The transistor reaches a minimum subthreshold swing of 43 mV/dec at VDS = 300 mV with a sub-60 mV/dec operation over a wide current range. Combined with a high transconductance of 205 μS/μm , the ON-current for the same device is 18.6 μA/μm at VDS = 300 mV for IOFF of 1 nA/ μm.
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| 3. |
- Rangasamy, Gautham, et al.
(författare)
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Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
- 2023
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Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 44:7, s. 1212-1215
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Tidskriftsartikel (refereegranskat)abstract
- We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of 1~μ s. We find that self-heating is a limiting factor for device performance.
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| 4. |
- Rangasamy, Gautham, et al.
(författare)
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Source Design of Vertical III-V Nanowire Tunnel Field-Effect Transistors
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Ingår i: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. - 2329-9231. ; 10, s. 8-12
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Tidskriftsartikel (refereegranskat)abstract
- We systematically fabricate devices and analyse data for vertical InAs/(In)GaAsSb nanowire Tunnel Field-Effect Transistors, to study the influence of source dopant position and level on their device performance. The results show that delaying the introduction of dopants further in the GaAsSb source segments improved the transistor metrics (subthreshold swing and the ON-current performance), due to the formation of a nid-InAsSb segment. The devices display a minimum subthreshold swing of 26 mV/dec and ON-current of 10.2 μA/μm at V DS of 300 mV. The performance of devices were improved further by optimizing the doping levels which led to record subthermal current of 1.2 μA/μm and transconductance of 205 μS/μm at V DS of 500 mV.
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| 5. |
- Rangasamy, Gautham, et al.
(författare)
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TFET Circuit Configurations Operating below 60 mV/dec
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Ingår i: IEEE Transactions on Nanotechnology. - 1536-125X. ; , s. 1-8
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Tidskriftsartikel (refereegranskat)abstract
- Tunnel Field-Effect Transistors (TFETs) offer more energy efficient alternative to CMOS for design of low power circuits. In spite of this potential, circuits based on TFETs have not been experimentally demonstrated so far. In this letter, we explore TFET fabrication and basic functionality of n-TFET based circuits in the following configurations: a current mirror, a diode-connected inverter, and a cascode. Individual TFETs in the circuit operate well below 60 mV/dec operation with minimum achieved subthreshold swing (SS) of 30 mV/dec at drain voltage of 400 mV. To analyse the circuit operation, individual devices are connected via FEOL and are biased at 300 mV supply voltage, with an input frequency of 200 kHz. The measured circuit configurations demonstrate the expected functionality.
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| 6. |
- Rangasamy, Gautham
(författare)
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Vertical III-V Nanowire Tunnel Field-Effect Transistors : A Circuit Perspective
- 2023
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The energy scaling of integrated circuits has reached its limit because the operating voltage of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET) based switches has reached its minimum value. MOSFETs are limited by thermionic emission and cannot achieve a subthreshold swing (SS) below 60 mV/decade at room temperature. Tunnel Field-Effect Transistors (TFET), which operate on field modulation of band-to-band tunneling (BTBT), can deliver SS less than 60 mV/dec and are considered as a potential alternative for MOSFETs to further scale down the supply voltage.This thesis work studied the capabilities and limitations of n-type TFETs based on III-V vertical nanowires and their circuit implementation. TFETs were fabricated using vertical InAs/GaSb or InAs/InGaAsSb/GaSb nanowires of high materialquality, and, switching from InAs/GaSb to InAs/InGaAsSb/GaSb allowed for optimization of the heterojunction, resulted in improvement of the device metrics. Along with heterostructure optimization, the dopant introduction and concentration were systematically varied to achieve devices with record performance. These devices achieved a minimum subthreshold swing of 42 mV/dec and a record high I60 of 1.2 μA/μm at a drive voltage of 0.5 V. The stability and high yield of the process allowed for statistical study of correlations between important device parameters such as I60, on-current, subthreshold swing, and off-current. The implementation of circuits was also aided by sufficient process repeatability and yield.To implement circuits based on these TFETs, the fabrication process was optimized with introduction of mesa and nonorganic spacers. Voltage based circuits in the following configurations were implemented: a current mirror, a diode connected inverter and a cascode buffer. Individual TFETs in the circuit operate well below 60 mV/dec operation with minimum achieved subthreshold swing (SS) of 30 mV/dec at drain voltage of 400 mV. In circuit operation, individual devices were connected via FEOL and are biased at 300 mV supply voltage, with an input frequency of 200 kHz. To explore current-mode based design principle, a current conveyor circuit was implemented, which exhibits large-signal voltage gain of 0.89 mV/mV, a current gain of 1 nA/nA and an operating frequency of 320 kHz.Additionally, self-heating in a vertical nanowire device was examined using pulsed IV methodology. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of 1 μs. We find that self-heating is a limiting factor for device performance.
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