| 1. |
- Albertsson, Dagur Ingi, et al.
(författare)
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A Magnetic Field-to-Digital Converter Employing a Spin-Torque Nano-Oscillator
- 2020
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Ingår i: IEEE transactions on nanotechnology. - : Institute of Electrical and Electronics Engineers (IEEE). - 1536-125X .- 1941-0085. ; 19, s. 565-570
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Tidskriftsartikel (refereegranskat)abstract
- In this work, a novel magnetic field-to-digital converter based on emerging spin-torque nano-oscillators (STNOs) is proposed. The architecture is inspired by voltage controlled oscillator (VCO)-based analog-to-digital converters (ADCs) which have shown inherent first-order noise shaping of both quantization- and phase-noise without the need for feedback. In the proposed architecture, the STNO acts both as a magnetic field sensor and VCO. The architecture's performance is evaluated in terms of signal-to-noise and distortion ratio (SNDR) utilizing Verilog-AMS modeling, where a macrospin model fitted to experimental data is employed for accurate description of the STNO operation. The presented simulation results demonstrate the potential of the STNO-based magnetic field-to-digital converter architecture.
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| 2. |
- Albertsson, Dagur Ingi, 1993-, et al.
(författare)
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Compact Macrospin-Based Model of Three-Terminal Spin-Hall Nano Oscillators
- 2019
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Ingår i: IEEE transactions on magnetics. - : IEEE Press. - 0018-9464 .- 1941-0069. ; 55:10
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Tidskriftsartikel (refereegranskat)abstract
- Emerging spin-torque nano oscillators (STNOs) and spin-Hall nano oscillators (SHNOs) are potential candidates for microwave applications. Recent advances in three-terminal magnetic tunnel junction (MTJ)-based SHNOs opened the possibility to develop more reliable and well-controlled oscillators, thanks to individual spin Hall-driven precession excitation and read-out paths. To develop hybrid systems by integrating three-terminal SHNOs and CMOS circuits, an electrical model able to capture the analog characteristics of three-terminal SHNOs is needed. This model needs to be compatible with current electric design automation (EDA) tools. This work presents a comprehensive macrospin-based model of three-terminal SHNOs able to describe the dc operating point, frequency modulation, phase noise, and output power. Moreover, the effect of voltage-controlled magnetic anisotropy (VCMA) is included. The model shows good agreement with experimental measurements and could be used in developing hybrid three-terminal SHNO/CMOS systems.
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| 3. |
- Albertsson, Dagur Ingi, et al.
(författare)
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Experimental Demonstration of Duffing Oscillator-Based Analog Ising Machines
- 2024
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Ingår i: LASCAS 2024 - 15th IEEE Latin American Symposium on Circuits and Systems, Proceedings. - : Institute of Electrical and Electronics Engineers (IEEE).
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Konferensbidrag (refereegranskat)abstract
- This paper presents a proof-of-concept analog Ising Machine, which can solve combinatorial optimization problems using bifurcations in networks of coupled Duffing oscillators. The proof-of-concept system consists of a network of four coupled Duffing oscillators implemented with low-cost components on a prototyping board. Experimental results demonstrate that the proposed prototype operates as an Ising Machine and it can solve various Max-Cut problems. This work provides the foundation towards realizing analog Ising Machines based on circuits that exhibit bifurcation properties, such as the Duffing oscillators, and that can be scaled to large networks.
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| 4. |
- Albertsson, Dagur Ingi, et al.
(författare)
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Highly reconfigurable oscillator-based Ising Machine through quasiperiodic modulation of coupling strength
- 2023
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Ingår i: Scientific Reports. - : Springer Nature. - 2045-2322. ; 13:1
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Tidskriftsartikel (refereegranskat)abstract
- Ising Machines (IMs) have the potential to outperform conventional Von-Neuman architectures in notoriously difficult optimization problems. Various IM implementations have been proposed based on quantum, optical, digital and analog CMOS, as well as emerging technologies. Networks of coupled electronic oscillators have recently been shown to exhibit characteristics required for implementing IMs. However, for this approach to successfully solve complex optimization problems, a highly reconfigurable implementation is needed. In this work, the possibility of implementing highly reconfigurable oscillator-based IMs is explored. An implementation based on quasiperiodically modulated coupling strength through a common medium is proposed and its potential is demonstrated through numerical simulations. Moreover, a proof-of-concept implementation based on CMOS coupled ring oscillators is proposed and its functionality is demonstrated. Simulation results show that our proposed architecture can consistently find the Max-Cut solution and demonstrate the potential to greatly simplify the physical implementation of highly reconfigurable oscillator-based IMs.
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| 5. |
- Albertsson, Dagur Ingi, et al.
(författare)
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Ising Machine Based on Bifurcations in a Network of Duffing Oscillators
- 2023
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Ingår i: Proceedings. - : Institute of Electrical and Electronics Engineers (IEEE).
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Konferensbidrag (refereegranskat)abstract
- Ising Machines have been extensively explored latelyfor developing new nonconventional computing architectures. Arecently proposed approach, based on simulating a dynamicalsystem exhibiting bifurcations, has shown promising performance. Inspired by this concept, we propose using bifurcationsin a network of coupled electrical Duffing oscillators to realize anIsing Machine. Numerical simulations of large Duffing oscillatornetworks, solving various Max-Cut problems, demonstrate thepotential of our proposed approach for realizing Ising Machinesbased on bifurcations. It also establishes a new direction towardsanalog Ising Machine architectures.
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| 6. |
- Albertsson, Dagur Ingi
(författare)
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Spintronic and Electronic Oscillators for Magnetic Field Sensing and Ising Machines
- 2023
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Oscillators can exhibit a range of complex dynamics which are often encountered in nature. These characteristics include synchronization, injection locking, chaos, bifurcations, etc. To date, the applications of electronic oscillators has mostly been limited to communication systems. However, in recent years, the possibility of using the rich dynamics of oscillators in unconventional applications, including time-based information processing and computational applications, has been also explored. In this thesis, this potential is investigated using emerging spintronic oscillators and established electronic oscillators. The first part of this thesis targets emerging spintronic oscillators, which exhibit a range of attractive features, including GHz operating frequency, wide tunability and nanoscale size. To explore the potential of these devices, an electrical behavioural model was developed for the promising three-terminal spin-Hall nano-oscillator. The behavioural model is based on the macrospin approximation, which is commonly used to describe the operation principles of spintronic oscillators, and it was implemented in Verilog-A. Moreover, the behavioural model was verified against experimental measurements from literature, demonstrating that the most important characteristics of three-terminal spin-Hall nano-oscillators are accurately captured. Subsequently, two potential applications that could benefit from the unique characteristics of spintronic oscillators were identified and explored. First, a magnetic field sensing system, which takes advantage of the wide frequency tunability of spintronic oscillators as a function of externally applied magnetic field, was proposed and demonstrated. This sensing system, inspired by voltage-controlled oscillator analog-to-digital converters, shows performance similar to the state-of-the-art magnetic field sensors, making it a promising application for spintronic oscillators. Next, the possibility of utilizing spintronic oscillators to realize Ising machines (IMs) was explored and demonstrated with numerical simulations. This was the first-time demonstration of spintronic oscillator-based Ising machines. The numerical simulation results show that spintronic oscillators are a promising device to realize ultra-fast Ising Machines able to solve complex combinatorial optimization problems on nano-second time scale.The second part of the thesis extends on the idea of oscillator-based IMs, but using electronic oscillators. The potential of realizing highly reconfigurable oscillator-based IMs based on quasiperiodically modulated coupling was explored. The advantages and potential challenges associated with this approach were highlighted, and a proof-of-concept IM using CMOS ring oscillators was proposed and simulated. Finally, a completely new type of IMs based on bifurcations in a network of coupled Duffing oscillators was proposed and developed. This work highlights a new research direction based on using dynamical systems implemented with analog circuits to realize IMs.
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| 7. |
- Albertsson, Dagur Ingi, et al.
(författare)
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Ultrafast Ising Machines using spin torque nano-oscillators
- 2021
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Ingår i: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 118:11
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Tidskriftsartikel (refereegranskat)abstract
- Combinatorial optimization problems are known for being particularly hard to solve on traditional von Neumann architectures. This has led to the development of Ising Machines (IMs) based on quantum annealers and optical and electronic oscillators, demonstrating speed-ups compared to central processing unit (CPU) and graphics processing unit (GPU) algorithms. Spin torque nano-oscillators (STNOs) have shown GHz operating frequency, nanoscale size, and nanosecond turn-on time, which would allow their use in ultrafast oscillator-based IMs. Here, we show using numerical simulations based on STNO auto-oscillator theory that STNOs exhibit fundamental characteristics needed to realize IMs, including in-phase/out-of-phase synchronization and second harmonic injection locking phase binarization. Furthermore, we demonstrate numerically that large STNO network IMs can solve Max-Cut problems on nanosecond timescales.
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| 8. |
- Chaourani, Panagiotis, 1989-, et al.
(författare)
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A Study on Monolithic 3-D RF/AMS ICs: Placing Digital Blocks Under Inductors
- 2018
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Ingår i: IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). - : IEEE conference proceedings.
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Konferensbidrag (refereegranskat)abstract
- The placement of bottom tier blocks under top-tierinductors could significantly improve the area-efficiency of M3DRF/AMS circuits, paving the way for new applications of thisintegration technology. This work investigates the potential ofplacing digital blocks in the bottom tier, underneath top tierinductors. A design-technology co-optimization flow is appliedand a number of design guidelines are suggested. These guidelinesensure high electromagnetic isolation between the two tiers, withminimum penalties on the loading of bottom tier wires, as wellas on the inductor’s performance.
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| 9. |
- Chaourani, Panagiotis, 1989-, et al.
(författare)
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Enabling Area Efficient RF ICs through Monolithic 3D Integration
- 2017
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Ingår i: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. - : Institute of Electrical and Electronics Engineers (IEEE). - 9783981537093 ; , s. 610-613
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Konferensbidrag (refereegranskat)abstract
- The Monolithic 3D (M3D) integration technology has emerged as a promising alternative to dimensional scaling thanks to the unprecedented integration density capabilities and the low interconnect parasitics that it offers. In order to support technological investigations and enable future M3D circuits, M3D design methodologies, flows and tools are essential. Prospective M3D digital applications have attracted a lot of scientific interest. This paper identifies the potential of M3D RF/analog circuits and presents the first attempt to demonstrate such circuits. Towards this, a M3D custom design platform, which is fully compatible with commercial design tools, is proposed and validated. The design platform includes process characteristics, device models, LVS and DRC rules and a parasitic extraction flow. The envisioned M3D structure is built on a commercial CMOS process that serves as the bottom tier, whereas a SOI process is used as top tier. To validate the proposed design flow and to investigate the potential of M3D RF/analog circuits, a RF front-end design for Zig-Bee WPAN applications is used as case-study. The M3D RF front-end circuit achieves 35.5 % area reduction, while showing similar performance with the original 2D circuit.
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| 10. |
- Chaourani, Panagiotis, et al.
(författare)
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Inductors in a Monolithic 3-D Process : Performance Analysis and Design Guidelines
- 2019
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Ingår i: IEEE Transactions on Very Large Scale Integration (vlsi) Systems. - : Institute of Electrical and Electronics Engineers (IEEE). - 1063-8210 .- 1557-9999. ; 27:2, s. 468-480
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Tidskriftsartikel (refereegranskat)abstract
- Monolithic 3-D (M3D) integration technology has demonstrated significant area reduction in digital systems. Recently, its applications to other fields have been considered as well. To fully investigate the potential of M3D for radio-frequency/analog-mixed signal (RF/AMS) circuits and systems, the behavior of inductors in this technology needs to be evaluated. Toward this, in this paper, the effect of M3D integration on their inductance densities and quality factors has been analyzed. The impact of shields on M3D inductors has been investigated, as well as the shunting of multiple metal layers to form multimetal inductors. In an attempt to improve the area efficiency of M3D RF/AMS circuits, the potential of placing bottom-tier blocks underneath top-tier inductors has been identified, and a set of guidelines has been proposed to maximize the inter-tier electromagnetic isolation. These guidelines deal with the suitable position of both low- and high-frequency blocks, their wiring, as well as the type of shield that is needed between them and the inductors. To prove the efficiency of these guidelines, an array of bottom-tier resistors has been placed underneath a top-tier inductor, resulting in more than 50 dB of inter-tier isolation for frequencies up to 20 GHz.
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