| 1. |
- Cijvat, Pieternella, et al.
(författare)
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A 2.4 GHz CMOS power amplifier using internal frequency doubling
- 2005
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Ingår i: 2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings. - Kobe, Japan : IEEE Press. - 0780388348 ; , s. 2683-2686
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Konferensbidrag (refereegranskat)abstract
- A fully integrated 0.18 μm 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz
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| 2. |
- Goluguri, Vara Prasad, et al.
(författare)
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A Quad-Core 130-nm CMOS 57-64 GHz VCO
- 2008
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Ingår i: GigaHertz 2008. Proceedings from the 9th Symposium, Mars 5-6, 2008, Göteborg, Sweden.
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Konferensbidrag (refereegranskat)
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| 3. |
- Tillman, Fred, et al.
(författare)
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A 1.2 volt 1.8GHz CMOS quadrature front-end
- 2004
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Ingår i: 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525). - 0780382870 ; , s. 362-365
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Konferensbidrag (refereegranskat)abstract
- A fully integrated 1.2V 0.25 μm CMOS quadrature frontend for a low or zero IF receiver has been designed and measured. The front-end consists of a common-gate LNA, a quadrature passive mixer, and a quadrature VCO operating at 1.8GHz. The conversion gain is 16dB, the noise figure is 6dB, the CP1 is -18dBm, the IIP2 is 27dBm, and the IIP3 is -6dBm. The total power consumption is 9.6mW and the IF quadrature phase error is below 1.8 degrees over the complete RF bandwidth of 160MHz
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| 4. |
- Troedsson, Niklas, et al.
(författare)
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A distributed capacitance analysis of co-planar inductors for a CMOS QVCO with varactor tuned buffer stage
- 2005
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Ingår i: Analog Integrated Circuits and Signal Processing. - : Springer Science and Business Media LLC. - 0925-1030 .- 1573-1979. ; 42:1, s. 7-19
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Tidskriftsartikel (refereegranskat)abstract
- A quadrature voltage controlled oscillator (QVCO) topology exhibiting low power consumption and high phase noise performance at low supply voltages is presented. The QVCO buffer includes varactors to maximize the output voltage and minimize the current consumption. Microstrip theory and the principle of conservation of energy have been used to evaluate the distributed capacitances of symmetrical inductors to better predict the resonance frequency. The QVCO is implemented in a 0.25 mum CMOS process from Agere Systems. The total current consumption including the buffer is 5.4 mA at 1.3 V supply, where of the QVCO uses 2.0 mA. The phase noise measures below - 138 dBc/Hz at 3 MHz offset frequency over the 8.9% tuning range 1.715 GHz 1.875 GHz.
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| 5. |
- Troedsson, Niklas, et al.
(författare)
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An ultra low voltage 2.4GHz CMOS VCO
- 2002
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Ingår i: Proceedings RAWCON 2002. 2002 IEEE Radio and Wireless Conference (Cat. No.02EX573). - 0780374584 ; , s. 205-208
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Konferensbidrag (refereegranskat)abstract
- A 2.4 GHz voltage controlled oscillator (VCO) with very low supply voltage is presented. The oscillator works at just 100 mV above the threshold voltage while fulfilling the phase noise requirements of Bluetooth. The very low supply voltage is achieved by replacing the current-source typically used with an inductor at the source node, thereby eliminating the DC-voltage drop. The oscillator measures a timing range of 13%, a current consumption of 2.8 mA, and a phase noise of -130 dBc/Hz at 3 MHz offset from the carrier frequency for a 0.7 V supply
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| 6. |
- Troedsson, Niklas, et al.
(författare)
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Differential measurement and parameter extraction of symmetrical inductors
- 2005
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Ingår i: [Host publication title missing]. - 1424400643 ; , s. 289-292
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Konferensbidrag (refereegranskat)abstract
- Measurements and extraction of Q-value and self-resonance frequency of on-chip differential symmetrical inductors have been performed. Both 1-port and 2-port measurements have been carried out. In the 1-port measurements a high frequency broadband 180
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| 7. |
- Troedsson, Niklas, et al.
(författare)
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Full oscillation cycle phase noise analysis of differential CMOS LC oscillators
- 2006
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Ingår i: Analog Integrated Circuits and Signal Processing. - : Springer Science and Business Media LLC. - 0925-1030 .- 1573-1979. ; 48:3, s. 211-222
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Tidskriftsartikel (refereegranskat)abstract
- This paper analyzes the phase noise of the widely used differential LC oscillator topology and presents brief equations describing phase noise over the entire oscillation period. The findings show that if a capacitance is present at the source node of the differential pair, two phenomena occur that increase the phase noise: the switch time increases, lengthening the interval spent in a noisy balanced state and increasing the transistor noise excess factor; and at higher frequencies the unbalanced state starts to contribute phase noise. The analysis is based upon the superposition of piecewise linear equations using the EKV transistor model, which includes a concise formulation of the noise excess factor.
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| 8. |
- Troedsson, Niklas, et al.
(författare)
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High performance 1 V 2.4 GHz CMOS VCO
- 2002
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Ingår i: 2002 IEEE Asia-Pacific Conference on ASIC. Proceedings (Cat. No.02EX547). - 0780373634 ; , s. 185-188
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Konferensbidrag (refereegranskat)abstract
- A low phase noise 2.4 GHz voltage controlled oscillator (VCO) with 1 V supply is presented. The VCO is based on the differential negative resistance oscillator with the tail current source replaced by an inductor. The inductor both improves the noise factor of the oscillator and enables maximum voltage swing over the tank. The amplitude limitation which is usually set by the tail current source is instead performed by an amplitude control loop adjusting the gate bias voltage. The oscillator measures a tuning range of 15%, a power consumption of 5.5 mW, and a phase noise of -136 dBc/Hz at 3 MHz offset from the carrier frequency for a 1 V supply
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| 9. |
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| 10. |
- Troedsson, Niklas, et al.
(författare)
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Monolithic inductor modeling and optimization
- 2006
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Ingår i: Radio Design in Nanometer Technologies. - Dordrecht : Springer Netherlands. - 1402048238 ; , s. 217-240
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Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
- It has become a necessity to use on-chip inductors in radio frequency integrated circuits. Particularly oscillators need inductors to archive high performance. In LC oscillators the quality factor of the inductor is critical to the phase noise performance, and since the self-resonance frequency of the inductor will limit the operating frequency and tuning range of the oscillator, careful optimization is needed. As the transistors are scaled to smaller geometries, the supply voltage must be reduced. Since the inductors have almost zero DC voltage drop they can be used to increase the voltage headroom in low voltage RF circuits. For cross-coupled differential pair LC oscillators, an inductor at the source node of the differential pair will not only increase the signal headroom [1], but if resonating at twice the oscillation frequency it will also increase the phase noise performance significantly [2]. The gain and noise factor of LNAs and mixers can also be improved by using inductors to tune out parasitic capacitances [3].
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